C8051F530-IMR Silicon Labs, C8051F530-IMR Datasheet - Page 39

no-image

C8051F530-IMR

Manufacturer Part Number
C8051F530-IMR
Description
8-bit Microcontrollers - MCU 8KB 12ADC 125C
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F530-IMR

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
8 KB
Data Ram Size
256 B
On-chip Adc
Yes
Package / Case
QFN EP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
16
Interface Type
SPI, UART
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
3
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
1500
Supply Voltage - Max
2.7 V, 5.25 V
Supply Voltage - Min
2 V, 2.7 V
Table 3.3. DFN-10 Landing Diagram Dimensions
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter
7. A 4x1 array of 1.60 x 0.45 mm openings on 0.65 mm pitch should be used for
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
between the solder mask and the metal pad is to be 60 µm minimum, all the
way around the pad.
should be used to assure good solder paste release.
pads.
the center ground pad.
specification for Small Body Components.
Dimension
C1
X1
X2
Y1
Y2
E
Figure 3.3. DFN-10 Landing Diagram
Rev. 1.4
2.90
0.20
1.70
0.70
2.45
Min
0.50 BSC.
C8051F52x/F53x
Max
3.00
0.30
1.80
0.80
2.55
39

Related parts for C8051F530-IMR