C8051F530-IMR Silicon Labs, C8051F530-IMR Datasheet - Page 205

• Manufacturer Part Number: C8051F530-IMR
• Description: 8-bit Microcontrollers - MCU 8KB 12ADC 125C
• Manufacturer: Silicon Labs

Specifications of C8051F530-IMR

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Package / Case: QFN EP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 16
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 1500
• Supply Voltage - Max: 2.7 V, 5.25 V
• Supply Voltage - Min: 2 V, 2.7 V

19.3.2. Watchdog Timer Usage
To configure the WDT, perform the following tasks:





The PCA clock source and Idle mode select cannot be changed while the WDT is enabled. The watchdog
timer is enabled by setting the WDTE or WDLCK bits in the PCA0MD register. When WDLCK is set, the
WDT cannot be disabled until the next system reset. If WDLCK is not set, the WDT is disabled by clearing
the WDTE bit.
The WDT is enabled following any reset. The PCA0 counter clock defaults to the system clock divided by
12, PCA0L defaults to 0x00, and PCA0CPL2 defaults to 0x00. Using Equation 19.4, this results in a WDT
timeout interval of 3072 system clock cycles. Table 19.3 lists some example timeout intervals for typical
system clocks.
Disable the WDT by writing a 0 to the WDTE bit.
Select the desired PCA clock source (with the CPS2-CPS0 bits).
Load PCA0CPL2 with the desired WDT update offset value.
Configure the PCA Idle mode (set CIDL if the WDT should be suspended while the CPU is in Idle
mode).
Enable the WDT by setting the WDTE bit to 1.
Notes:
System Clock (Hz)
1. Assumes SYSCLK / 12 as the PCA clock source, and a PCA0L
2. Internal oscillator reset frequency.
24,500,000
24,500,000
24,500,000
18,432,000
18,432,000
18,432,000
11,059,200
11,059,200
11,059,200
Table 19.3. Watchdog Timer Timeout Intervals
3,062,500
3,062,500
3,062,500
value of 0x00 at the update time.
191,406
191,406
191,406
32,000
32,000
32,000
2
2
2
PCA0CPL2
Rev. 1.4
255
128
255
128
255
128
255
128
255
128
255
128
32
32
32
32
32
32
Timeout Interval (ms)
C8051F52x/F53x
24576
12384
129.5
4109
2070
3168
32.1
16.2
42.7
21.5
71.1
35.8
33.1
257
530
4.1
5.5
9.2
1
205