C8051F530-IMR Silicon Labs, C8051F530-IMR Datasheet - Page 169

• Manufacturer Part Number: C8051F530-IMR
• Description: 8-bit Microcontrollers - MCU 8KB 12ADC 125C
• Manufacturer: Silicon Labs

Specifications of C8051F530-IMR

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Package / Case: QFN EP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 16
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 1500
• Supply Voltage - Max: 2.7 V, 5.25 V
• Supply Voltage - Min: 2 V, 2.7 V

17.3. LIN Master Mode Operation
The master node is responsible for the scheduling of messages and sends the header of each frame, con-
taining the SYNCH BREAK FIELD, SYNCH FIELD and IDENTIFIER FIELD. The steps to schedule a mes-
sage transmission or reception are listed below.
1. Load the 6-bit Identifier into the LIN0ID register.
2. Load the data length into the LIN0SIZE register. Set the value to the number of data bytes or "1111b" if
3. Set the data direction by setting the TXRX bit (LIN0CTRL.5). Set the bit to 1 to perform a master
4. If performing a master transmit operation, load the data bytes to transmit into the data buffer (LIN0DT1
5. Set the STREQ bit (LIN0CTRL.0) to start the message transfer. The LIN peripheral will schedule the
This code segment shows the procedure to schedule a message in a transmission operation:
The application should perform the following steps when an interrupt is requested.
1. Check the DONE bit (LIN0ST.0) and the ERROR bit (LIN0ST.2).
2. If performing a master receive operation and the transfer was successful, read the received data from
3. If the transfer was not successful, check the error register to determine the kind of error. Further error
4. Set the RSTINT (LIN0CTRL.3) and RSTERR bits (LIN0CTRL.2) to reset the interrupt request and the
the data length should be decoded from the identifier. Also, set the checksum type, classic or
enhanced, in the same LIN0SIZE register.
transmit operation, or set the bit to 0 to perform a master receive operation.
to LIN0DT8).
message frame and request an interrupt if the message transfer is successfully completed or if an error
has occurred.
the data buffer.
handling has to be done by the application.
error flags.
LINADDR
LINDATA
LINADDR
LINDATA
LINADDR
LINDATA
LINADDR = 0x00;// Point to Data buffer first byte
for (i=0; i<8; i++)
{
}
LINADDR
LINDATA
LINDATA = i + 0x41;// Load the buffer with ‘A’, ‘B’, ...
LINADDR++;// Increment the address to the next buffer
|=
= 0x08;// Point to LIN0CTRL
= 0x0E;// Point to LIN0ID
= 0x11;// Load the ID, in this example 0x11
= 0x0B;// Point to LIN0SIZE
= ( LINDATA & 0xF0 ) | 0x08; // Load the size with 8
= 0x08;// Point to LIN0CTRL
= 0x01;// Start Request
0x20;// Select to transmit data
Rev. 1.4
C8051F52x/F53x
169