C8051F530-IMR Silicon Labs, C8051F530-IMR Datasheet - Page 217

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C8051F530-IMR

Manufacturer Part Number
C8051F530-IMR
Description
8-bit Microcontrollers - MCU 8KB 12ADC 125C
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F530-IMR

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
8 KB
Data Ram Size
256 B
On-chip Adc
Yes
Package / Case
QFN EP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
16
Interface Type
SPI, UART
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
3
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
1500
Supply Voltage - Max
2.7 V, 5.25 V
Supply Voltage - Min
2 V, 2.7 V
D
Revision 0.3 to 0.4
Revision 0.4 to 0.5
Revision 0.5 to 1.0
Revision 1.0 to 1.1
Revision 1.1 to 1.2
Note: All items from the C8051F52xA-F53xA Errata dated August 26, 2009 are incorporated into this data sheet.
OCUMENT
Updated all specification tables.
Added 'F52xA and 'F53xA information.
Updated the Selectable Gain section in the ADC section.
Updated the External Crystal Example in the Oscillators section.
Updated the LIN section.
Updated all specification tables.
Updated Figures 1.1, 1.2, 1.3, and 1.4.
Updated Section 4 pinout diagrams and tables.
Updated all specification tables and moved them to one section.
Added Figure 3.1 and Figure 3.2.
Updated Section 4 pinout diagrams and tables.
Updated Figure 5.6.
Added Figure 15.3.
Updated equations in Section 17.
Updated Figure 21.3.
Updated Table 2.3, “ADC0 Electrical Characteristics,” on page 28 with new Burst Mode Oscillator
specification, new Power Supply Current maximum, and made corrections to Temperature Sensor
Offset and Offset Error conditions.
Updated Table 2.9, “Flash Electrical Characteristics,” on page 33 with new Flash Write and Erase
timing.
Made correction in Equivalent Gain table in Section “4.4. Selectable Gain” on page 60.
Updated Section “11.2. Power-Fail Reset / VDD Monitors (VDDMON0 and VDDMON1)” on page 108
regarding higher V
Updated “Ordering Information” on page 14 and Table 1.1, “Product Selection Guide (Recommended
for New Designs),” on page 14 to include -A (Automotive) devices and automotive qualification
information.
Updated Table 2.3, “ADC0 Electrical Characteristics,” on page 28 to include Temperature Sensor
tracking time requirement and update INL maximum specification.
Updated Figure 3.2. ’DFN-10 Package Diagram’ on page 38 with new Pin-1 detail drawing.
Updated Table 8.1, “CIP-51 Instruction Set Summary,” on page 83 with correct CJNE and CPL timing.
Updated “Power-Fail Reset / VDD Monitors (VDDMON0 and VDDMON1)” on page 108 to clarify the
recommendations for the VDD monitor.
C
HANGE
DD
monitor threshold.
L
IST
Rev. 1.4
C8051F52x/F53x
217

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