DS32512NW Maxim Integrated, DS32512NW Datasheet - Page 17

• Manufacturer Part Number: DS32512NW
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS32512NW

• Part # Aliases: 90-32512-NW0

7.2 Detailed Pin Descriptions
n = port number (1 to 12 for DS32512, 1 to 8 for DS32508, 1 to 6 for DS32506). I = input, Ipu = input with internal pullup resistor, Ipd = input with
internal pulldown resistor, Ia = analog input, I/O = bidirectional in/out, I/Opd = bidirectional in/out with internal pulldown resistor, O = output, Oz =
high-impedance output (needs an external pullup or pulldown resistor to keep the node from floating), Oa = analog output (high impedance), P=
power supply or ground. All unused input pins without pullup should be tied low. Note: All internal pullup resistors are 50k Ω tied to 2.2V DC.
Table 7-2. Analog Line Interface Pin Descriptions
Table 7-3. Digital Framer Interface Pin Descriptions
RPOSn/
RNEGn/
TPOSn/
TNEGn
TDATn
RCLKn
RDATn
RLCVn
TCLKn
NAME
NAME
RXPn,
TXPn,
RXNn
TXNn
TYPE
TYPE
Oz
Oz
Oa
Oz
Ia
I
I
I
Transmitter Analog Outputs. These differential AMI outputs are coupled to the outbound 75Ω
coaxial cable through a 1:1 transformer
impedance) using the
Receiver Analog Inputs. These differential AMI inputs are coupled to the inbound 75Ω coaxial
Transmit Clock. A DS3 (44.736MHz ±20ppm), E3 (34.368MHz ±20ppm), or STS-1
falling edge of
TCLKx (x ≠ 1) are ignored. See Section
Transmit Positive AMI/Transmit NRZ Data. This pin is sampled either on the rising edge of
TCLK (TCLKI
TPOSn: When the transmitter is configured to have a bipolar interface
pulse is transmitted on the line when
TDATn
TDAT
Transmit Negative AMI. When the transmitter is configured to have a bipolar interface
0), a negative pulse is transmitted on the line when
configured to have a binary interface
high or low.
of
Receive Clock. The clock recovered from the receive signal is output on the
Recovered data is output on the
RCLK (RCLKI
(RLOSn
8.3.6.
Receive Positive AMI/Receive NRZ Data. This pin is updated either on the falling edge of
RCLK (RCLKI
RPOSn: When the receiver is configured to have a bipolar interface
high for each positive AMI pulse received.
RDATn
decoded binary data.
Receive Negative AMI/Receive Line-Code Violation. This pin is updated either on the falling
edge of
further details on code violations.
RNEGn: When the receiver is configured to have a bipolar interface
high for each negative AMI pulse received.
RLCVn:
high to flag code violations.
cable through a 1:1 transformer
(51.840MHz ±20ppm) clock should be applied at this pin. Data to be transmitted is clocked into
the device at
TCLK (TCLKI
is transmitted after B3ZS or HDB3 encoding.
: When the transmitter is configured to have a binary interface
: When the receiver is configured to have a binary interface
RCLK (RCLKI
When the receiver is configured to have a binary interface
= 0), the
TNEG
TPOS/TDAT
= 0) or on the falling edge of
= 0) or the rising edge of
= 0) or the rising edge of
TCLK (TCLKI
= 1). See Section 8.2.2.
RCLK
is sampled either on the rising edge of
TOEn
= 0) or the rising edge of
output signal is derived from the LIU’s reference clock. See Section
and
pin or the TOE or TPD configuration bits. See Section 8.2.8.
= 1). When pin
17 of 130
TNEG
(Figure
RPOS/RDAT
TPOS
(TBIN
either on the rising edge of
(Figure
RCLK (RCLKI
RCLK (RCLKI
4-1). See Section 8.3.1.
8.2.1
FUNCTION
FUNCTION
TCLK (TCLKI
= 1),
is high.
TCC
for additional details.
and
4-1). These outputs can be disabled (high
RCLK (RCLKI
TNEG
= 1, all ports are clocked by TCLK1, and
RNEG/RLCV
TNEG
= 1). During a loss-of-signal condition
= 1). See Section 8.3.6.
is ignored and should be wired either
= 1). See Section 8.2.2.
TCLK (TCLKI
is high. When the transmitter is
= 1). See Section
DS32506/DS32508/DS32512
pins on the falling edge of
TCLK (TCLKI
(RBIN
(RBIN
(RBIN
(RBIN
(TBIN
(TBIN
= 0) or the falling edge
= 1),
= 1),
= 0),
= 0),
= 1), the data on
= 0), a positive
RCLK
RLCV
RDAT
= 0) or the
RPOS
RNEG
8.3.6
pin.
pulses
for
outputs
pulses
(TBIN
pulses
=