ZL50075GAC ZARLINK [Zarlink Semiconductor Inc], ZL50075GAC Datasheet - Page 8

• Manufacturer Part Number: ZL50075GAC
• Description: 32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 2 Streams (8, 16, 32 or 64 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Pin Diagram - ZL50075 19 mm x 19 mm 324 Ball PBGA (as viewed through top of package)
A1 corner identified by metallized marking.
A
B
C
D
G
H
K
M
N
R
U
E
F
L
P
T
V
J
STOA
STOB
STOB
STOA
STOB
STOA
STOA
STOB
D[15] D[14]
STIA
STIA
STIA
ODE
STIB
STIB
STIB
VSS
[12]
[11]
[1]
[2]
[2]
[3]
[3]
[3]
[5]
[6]
[7]
[7]
[8]
[9]
IC
1
STOA
STOB
STOA
STOB
STOB
STIB
CKO
STIB
STIB
STIB
STIA
STIB
STIA
STIB
VSS STOA
FPO
[10]
[11]
IM
[1]
[0]
[2]
[3]
[4]
[5]
[6]
[6]
[7]
[8]
[9]
[9]
[1]
2
STOB
STOA
STOB
STOA
D[11] D[10]
STIA
STIA
STIA
STIB
STIA
STIB
STIA
STIA
STIB
STIB
D[5]
[10]
[10]
[12]
[13]
[11]
[0]
[1]
[1]
[2]
[4]
[4]
[5]
[7]
IC
[8]
[9]
3
CORE
CORE
STOB
STOB
STOB
STOA
STOB
STOA
STOA
VDD_
VDD_
VDD_
VDD_
STIB
STIA
STIA
CKO
FPO
D[4]
[10]
[12]
[11]
[14]
[0]
[0]
[0]
IO
[4]
[5]
[6]
[8]
IO
[1]
4
CORE
CORE
CORE
CORE
STOA
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
STOA
STOB
STIA
VSS
VSS VDD_
VSS VDD_
VSS
D[3]
D[8]
[12]
[14]
[14]
[0]
IO
IO
IO
IO
5
CORE
CORE
VDD_
VDD_
VDD_
STOA
D[13]
D[12]
A[18] A[17] A[13] A[12] A[11]
STIA
STIB
STIB
VSS VDD_
VSS
VSS
VSS
VSS VDD_
D[7]
[13]
[13]
[14]
[16]
IO
IO
IO
6
CORE
CORE
STOB
STOB
STIA
VSS VDD_
VSS
VSS
VSS
VSS
VSS
VSS
VSS VDD_
D[6]
D[9]
D[2]
[15]
[13]
[15]
CKI
[0]
7
Zarlink Semiconductor Inc.
CORE
CORE
CORE
CORE
VDD_
VDD_
VDD_
VDD_
STIB
STIA
VSS
VSS
VSS
VSS
VSS
VSS
D[0]
D[1]
[15]
[16]
NC
IO
IO
8
ZL50075
VDD_
VDD_
STOA
STOB
STOA
A[15] A[10]
A[14]
A[16] VDD_
VSS VDD_
VSS
VSS
VSS
VSS
VSS
VSS
VSS VDD_
[15]
[16]
[16]
IO
IO
IC
9
8
CORE
CORE
VDD_
VSS VDD_
VSS
VSS
VSS
VSS
VSS
VSS
VSS VDD_
A[9]
FPI
10
IO
IO
[0]
IC
IC
CORE
CORE
VDD_
STOA
STIB
STIA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A[5]
A[6]
A[7]
A[8]
[17]
[17]
[17]
11
NC
IO
SEL[1]
BERR
VDD_
VDD_
STOB
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CK_
A[4]
A[1]
A[3]
[17]
12
IO
IO
IC
IC
CORE
CORE
CORE
CORE
SEL[0
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
WAIT
STIA
STIB
VSS
VSS
VSS
CK_
A[2]
[18]
[18]
13
NC
IO
IO
IO
IO
IO
CORE
CORE
CORE
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
VDD_
STOB
STOA
STIB
STIB
STIA
TCK VDD_
VSS VDD_
VSS
VSS VDD_
A[0]
[31]
[19]
[19]
[18]
[18]
14
CS
IO
IO
IO
IO
CORE
CORE
CORE
SIZ[0] PWR STOA
STOB
STOA
VDD_
STOA
VDD_
STOB
STOA
TDO
STIB
STIA
STIA
VSS STOA
R/W
[29]
[26]
[25]
[24]
[21]
[20]
[19]
[19]
TDI
15
IO
IO
STOA
STOB
STOA
STOA
STOB
STOA
STOB
STIA
TMS STOB
STIB
STIB
STIA
STIA
STIB
[31]
[30]
[29]
[28]
[27]
[26]
[24]
[23]
[22]
[21]
[21]
[20]
[20]
[20]
16
DS
IC
Data Sheet
STOA
STOB
STOB
STOA
STOB
STOB
STOB
TRST
STIB
STIA
STIB
STIB
VSS
[31]
[30]
[30]
[29]
[28]
[27]
[25]
[24]
[23]
[22]
[22]
[21]
[22]
17
NC
NC
IC
STOB
STOA
STOB
STOA
SIZ[1]
STIA
STIA
STIA
STIB
STIA
STIB
STIA
STIA
STIB
STIB
DTA
[31]
[30]
[29]
[28]
[28]
[27]
[27]
[26]
[26]
[25]
[25]
[24]
[23]
[23]
NC
18
IC