ZL50075GAC ZARLINK [Zarlink Semiconductor Inc], ZL50075GAC Datasheet - Page 38

• Manufacturer Part Number: ZL50075GAC
• Description: 32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 2 Streams (8, 16, 32 or 64 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

14.3.2
There are a total of 64 Bit Error Counters, corresponding to the 64 serial input streams. Each count value is 32 bits
wide, but only the least significant 16 bits are used. The most significant 16 bits of the bit error counters will always
read back zero. A write operation to any byte of the counter, including the 16 most significant bits, will clear that
counter.
Each bit error counter contains the number of single bit errors detected on the corresponding stream, since the
counter was last cleared. If the number of bit errors detected exceeds 65535 (decimal), the counter will hold that
value until it is cleared.
BER Input Group
Input Group Data Rate
Table 20 - BER Enable Control Memory Stream Address Offset at Various Output Rates
BER Counters
31
0
1
2
.
.
.
65 Mbps
32 Mbps
16 Mbps
8 Mbps
Table 21 - BER Counter Group and Stream Address Mapping
BER Input Stream
Time-slot Range
STiA31
STiB31
STiA0
STiB0
STiA1
STiB1
STiA2
STiB2
N/A
N/A
N/A
N/A
0 - 1023
0 - 511
0 - 255
0 - 127
.
.
.
N/A
N/A
Zarlink Semiconductor Inc.
ZL50075
38
Input Streams
Start Address (Hex)
BERR
BERR
STiAn
STiBn
STiAn
STiBn
STiAn
STiBn
STiAn
STiBn
BERR - 4017C
BERR - 40100
BERR - 40104
BERR - 40108
400FC
4007C
40000
40080
40004
40084
40008
40088
.
.
.
Address Offset Range (Hex)
00000 - 003FF
00000 - 001FF
00200 - 003FF
00000 - 000FF
00100 - 001FF
00200 - 003FF
00080 - 000FF
00100 - 003FF
00000 - 0007F
End Address (Hex)
BERR - 4018B
BERR - 401FF
BERR - 40183
BERR - 40187
N/A
4000B
4008B
400FF
40003
40083
40007
40087
4007F
.
.
.
Data Sheet