ZL50075GAC ZARLINK [Zarlink Semiconductor Inc], ZL50075GAC Datasheet - Page 54

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ZL50075GAC

Manufacturer Part Number
ZL50075GAC
Description
32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 2 Streams (8, 16, 32 or 64 Mbps), and 64 Inputs and 64 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
AC Electrical Characteristics - Serial Data Timing
Note 1:
Note 2:
Note 3:
Note 4:
No.
1
2
3
4
5
6
7
8
9
Data Capture points vary with respect to CKo edge depending on clock rates & fractional delay settings.
All of these specifications refer to ST-BUS inputs, ST-BUS outputs and CKo outputs set to internal clock source.
Typical figures are at 25°C, V
subject to production testing.
Loads on all serial outputs set to 30 pF.
STi to posedge CKo setup
STi to posedge CKo hold
STi to negedge CKo setup
STi to negedge CKo hold
Posedge CKo to Output Data Valid
Negedge CKo to Output Data Valid
Posedge CKo to Output Data tri-state
Negedge CKo to Output Data tri-state
CKo1 to CKo0 skew
Characteristic (Figure 15)
DD_CORE
at 1.8 V and V
Zarlink Semiconductor Inc.
ZL50075
1
t
t
t
t
t
t
t
Sym.
t
t
SONH
SOPS
SOPH
SONS
SOPV
SONV
SOPZ
SONZ
CKOS
DD_IO
to CKo
54
at 3.3 V and are for design aid only: not guaranteed and not
Min.
2
-2.0
-2.0
-1.2
-1.6
7.3
7.3
0.1
0.9
0.1
0.4
0
0
Typ.
3
Max.
2.7
4.6
1.7
3.7
4.9
5.1
4.7
4.8
1.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SToB
SToA
SToB
SToB
SToA
SToA
SToB
SToA
4
4
4
4
4
4
4
4
Notes
Data Sheet
4

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