XR16C2850CM48 EXAR [Exar Corporation], XR16C2850CM48 Datasheet - Page 10

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XR16C2850CM48

Manufacturer Part Number
XR16C2850CM48
Description
3.3V AND 5V DUART WITH 128-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet
Programming the Baud Rate Generator Registers
DLM and DLL provides the capability of selecting the
operating data rate. Table 5 shows the standard data
rates available with a 14.7456 MHz crystal or external
clock at 16X sampling rate clock rate. A 16X sampling
O
UTPUT
MCR Bit-7=1
115.2k
230.4k
19.2k
38.4k
57.6k
1200
2400
4800
9600
100
600
Data Rate
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16), with CLK8/16 pin = 1
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 8), with CLK8/16 pin = 0
F
T
IGURE
ABLE
X T A L1
X T A L2
O
UTPUT
6. B
5: T
MCR Bit-7=0
(D
153.6k
230.4k
460.8k
921.6k
EFAULT
19.2k
38.4k
76.8k
YPICAL DATA RATES WITH A
2400
4800
9600
400
AUD
Data Rate
3.3V AND 5V DUART WITH 128-BYTE FIFO
R
C ry s ta l
B u ffer
)
O s c /
ATE
G
Clock (Decimal)
D
ENERATOR AND
IVISOR FOR
2304
384
192
96
48
24
12
6
4
2
1
D iv id e b y 4
D iv id e b y 1
P re s ca le r
P re s ca le r
16x
14.7456 MH
P
D
10
RESCALER
IVISOR FOR
Clock (HEX)
clock is typically used. However, user can select the
8X sampling clock rate mode to double the operating
data rate. When using a non-standard data rate crys-
tal or external clock, the divisor value can be calculat-
ed for DLL/DLM with the following equation.
M C R B it-7 = 0
M C R B it-7 = 1
(d e fa ult)
900
180
C0
0C
60
30
18
06
04
02
01
Z CRYSTAL OR EXTERNAL CLOCK
16x
B a u d R a te
D L L an d D L M
G e n era to r
R e g iste rs
L o g ic
V
ALUE
P
ROGRAM
DLM
09
01
00
00
00
00
00
00
00
00
00
(HEX)
R a te C lo c k to
T ra n sm itte r
S a m plin g
V
1 6 X
ALUE
P
ROGRAM
DLL
C0
0C
00
80
60
30
18
06
04
02
01
(HEX)
XR16C2850
D
E
ATA
REV. 2.0.0
RROR
0
0
0
0
0
0
0
0
0
0
0
R
ATE
(%)

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