CP2400 SILABS [Silicon Laboratories], CP2400 Datasheet - Page 90

• Manufacturer Part Number: CP2400
• Description: 128/64 SEGMENT LCD DRIVER
• Manufacturer: SILABS [Silicon Laboratories]

CP2400/1/2/3
12.5. Mapping ULP Memory to LCD Pins
The ULP memory is organized in 16 bytes (32 half-bytes or nibbles), each nibble controlling 1 LCD output pin.
Each LCD output pin can control 1 to 4 LCD segments depending on the selected mux mode. The least significant
bit of each nibble controls the segment connected to the backplane signal COM0 and the most significant bit of
each nibble controls the segment connected to the backplane signal COM3. In static mode, only COM0 is used
and the three remaining bits in each nibble are ignored. In 4-mux mode, each bit controls an LCD segment. Bits
with a value of 1 turn on the associated segment and bits with a value of 0 turn off the associated segment.
90
B it:
7
6
Figure 12.2. ULP Memory Map
5
4
Rev. 1.0
3
2
1
0
(P ins: LC D 31, LC D 30)
(P ins: LC D 29, LC D 28)
(P ins: LC D 27, LC D 26)
(P ins: LC D 25, LC D 24)
(P ins: LC D 23, LC D 22)
(P ins: LC D 21, LC D 20)
(P ins: LC D 19, LC D 18)
(P ins: LC D 17, LC D 16)
(P ins: LC D 15, LC D 14)
(P ins: LC D 13, LC D 12)
(P ins: LC D 11, LC D 10)
(P ins: LC D 9, LC D 8)
(P ins: LC D 7, LC D 6)
(P ins: LC D 5, LC D 4)
(P ins: LC D 3, LC D 2)
(P ins: LC D 1, LC D 0)
U LP M E M 15
U LP M E M 14
U LP M E M 13
U LP M E M 12
U LP M E M 11
U LP M E M 10
U LP M E M 09
U LP M E M 08
U LP M E M 07
U LP M E M 06
U LP M E M 05
U LP M E M 04
U LP M E M 03
U LP M E M 02
U LP M E M 01
U LP M E M 00