CP2400 SILABS [Silicon Laboratories], CP2400 Datasheet - Page 87

• Manufacturer Part Number: CP2400
• Description: 128/64 SEGMENT LCD DRIVER
• Manufacturer: SILABS [Silicon Laboratories]

12.4. LCD Timing Generation
All LCD timing is derived from the SmaRTClock oscillator divided by 2. The LCD0DIVH:LCD0DIVL registers store
the prescaler for generating the LCD refresh rate. The LCD mux mode must be taken into account when
determining the prescaler value. See the LCD0DIVH/LCD0DIVL register descriptions for more details. For
maximum power savings, choose a slow LCD refresh rate. For the least flicker, choose a fast LCD refresh rate.
SFR Definition 12.4. LCD0DIVH: LCD Refresh Rate Prescaler High Byte
Address = 0x98
SFR Definition 12.5. LCD0DIVL: LCD Refresh Rate Prescaler Low Byte
Address = 0x99
Name
Reset
Name
Reset
Type
Type
7:2
1:0
7:0
Bit
Bit
Bit
Bit
LCD0DIV[9:8]
LCD0DIV[7:0]
Unused
R/W
Name
Name
7
0
7
0
Read = 000000. Write = Don’t Care.
LCD Refresh Rate Prescaler .
Sets the LCD refresh rate according to the following equation:
LCD Refresh Rate Prescaler .
Sets the LCD refresh rate according to the following equation:
LCD Refresh Rate
LCD Refresh Rate
R/W
6
0
6
0
R/W
5
0
5
0
=
=
SmaRTClock Oscillator Frequency
------------------------------------------------------------------------------------------- -
SmaRTClock Oscillator Frequency
------------------------------------------------------------------------------------------- -
4 mux_mode
4 mux_mode


Rev. 1.0
R/W
4
0
4
0
LCD0DIV[7:0]
R/W




LCD0DIV
LCD0DIV
Function
Function
R/W
3
0
3
0
+
+
1
1


R/W
2
0
2
0
CP2400/1/2/3
1
0
1
0
LCD0DIV[9:8]
R/W
0
0
0
0
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