CP2400 SILABS [Silicon Laboratories], CP2400 Datasheet - Page 65

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CP2400

Manufacturer Part Number
CP2400
Description
128/64 SEGMENT LCD DRIVER
Manufacturer
SILABS [Silicon Laboratories]
Datasheet

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CP2400/1/2/3
10.4. Registers for Accessing and Configuring Port I/O
All Port I/O are accessed and configured through registers. When writing to a Port, the value written to the PnOUT
register is latched to maintain the output data value at each pin. When reading, the logic levels of the Port's input
pins are returned in the PnIN. If the PnOUT register is read, the value returned will be the value of the output latch,
not the logic level of the port pad. The PnIN register is read only.
The Port input mode of the I/O pins is defined using the Port Input Mode registers (PnMDI). Each Port cell can be
configured for analog or digital I/O. The output driver characteristics of the digital I/O pins are defined using the Port
Output Mode registers (PnMDO). Each Port Output driver can be configured as either open drain or push-pull. To
configure a pin as a digital input, configure it as an open drain output and write 1 to its port latch.
The drive strength of the output drivers are controlled by the Port Drive Strength (PnDRIVE) registers. The default
is low drive strength. See Table 3.2 on page 13 for the difference in output drive strength between the two modes.
Rev. 1.0
65

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