CY14B101K-SP25XCT CYPRESS [Cypress Semiconductor], CY14B101K-SP25XCT Datasheet - Page 5

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CY14B101K-SP25XCT

Manufacturer Part Number
CY14B101K-SP25XCT
Description
1 Mbit (128K x 8) nvSRAM With Real Time Clock
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Table 1. Mode Selection
Notes
Document Number: 001-06401 Rev. *G
1. The six consecutive address locations are in the order listed. WE is HIGH during all six cycles to enable a nonvolatile cycle.
2. While there are 17 address lines on the CY14B101K, only the lower 16 lines are used to control software modes.
3. O state depends on the state of OE. The IO table shown is based on OE Low.
CE
H
L
L
L
L
L
L
WE
X
H
H
H
H
H
L
OE
X
X
L
L
L
L
L
A15 – A0
0xB1C7
0xB1C7
0xB1C7
0xB1C7
0x4E38
0x83E0
0x7C1F
0x8B45
0x4E38
0x83E0
0x7C1F
0x4B46
0x4E38
0x83E0
0x7C1F
0x8FC0
0x4E38
0x83E0
0x7C1F
0x4C63
0x703F
0x703F
0x703F
0x703F
X
X
X
WRITE SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
READ SRAM
Not Selected
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
Nonvolatile
AutoStore
AutoStore
Disable
Enable
Recall
Mode
Store
Output High Z
Output High Z
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Input Data
IO
Active I
CY14B101K
Active
Active
Active
Standby
Power
Active
Active
CC2
[1, 2, 3]
[1, 2, 3]
[1, 2, 3]
Page 5 of 24
[1, 2, 3]
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