CY14B101K-SP25XCT CYPRESS [Cypress Semiconductor], CY14B101K-SP25XCT Datasheet - Page 2

• Manufacturer Part Number: CY14B101K-SP25XCT
• Description: 1 Mbit (128K x 8) nvSRAM With Real Time Clock
• Manufacturer: CYPRESS [Cypress Semiconductor]

Pinouts
Pin Definitions
Document Number: 001-06401 Rev. *G
DQ0 – DQ7 Input Output Bidirectional Data IO Lines. Used as input or output lines depending on operation
Pin Name
A
V
V
0
V
RTCcap
RTCbat
HSB
V
V
WE
INT
NC
OE
CE
– A
X
X
CAP
CC
SS
1
2
16
Power Supply Capacitor Supplied Backup RTC Supply Voltage. (Left unconnected if V
Power Supply Battery Supplied Backup RTC Supply Voltage. (Left unconnected if V
Power Supply Power Supply Inputs to the Device.
Power Supply AutoStore
Input Output Hardware Store Busy. When LOW this output indicates a Hardware Store is in progress. When
No Connect No Connects. This pin is not connected to the die
IO Type
Ground
Output
Output
Input
Input
Input
Input
Input
Address inputs used to select one of the 131,072 bytes of the nvSRAM.
Write Enable Input, Active LOW. When selected LOW, enables data on the IO pins to be written
to the address location latched by the falling edge of CE.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output Enable, Active LOW. The active low OE input enables the data output buffers during READ
cycles. Deasserting OE high causes the IO pins to tri-state.
Crystal Connection, drives crystal on start up.
Crystal Connection for 32.768 kHz crystal.
Interrupt Output. Program to respond to the clock alarm, the watchdog timer, and the power monitor.
Programmable to either active HIGH (push or pull) or LOW (open drain).
Ground for the Device. Must be connected to ground of the system.
pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull up
resistor keeps this pin HIGH if not connected (connection optional).
to nonvolatile elements.
V
V
RTCbat
DQ0
DQ1
DQ2
V
CAP
A
A
A
INT
NC
NC
NC
NC
A
A
A
A
A
A
A
SS
A
x
x
16
14
12
2
2
7
6
5
4
3
1
0
1
TM
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
22
23
24
Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM
Figure 1. Pin Diagram - 48 SSOP
48-SSOP
(Not To Scale)
Top View
Description
39
38
37
36
35
34
33
32
31
30
29
28
48
47
46
45
43
42
41
40
27
26
25
44
A
HSB
NC
NC
NC
NC
NC
V
DQ
OE
A
CE
DQ7
DQ5
DQ4
DQ3
V
WE
A
A
A
A
V
V
RTCcap
CC
15
13
8
9
11
SS
10
CC
6
RTCcap
RTCbat
is used)
is used)
CY14B101K
Page 2 of 24
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