CY14B101K-SP25XCT CYPRESS [Cypress Semiconductor], CY14B101K-SP25XCT Datasheet - Page 21

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CY14B101K-SP25XCT

Manufacturer Part Number
CY14B101K-SP25XCT
Description
1 Mbit (128K x 8) nvSRAM With Real Time Clock
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
In the following figure, The six consecutive addresses must be READ in the order listed in the
must be HIGH during all six consecutive cycles.
In the following figure, this is the amount of time it takes to take action on a soft sequence command. Vcc power must remain
HIGH to effectively register the command. Commands such as STORE and RECALL lock out IO until operation is complete which
further increases this time. See the specific command.
Document Number: 001-06401 Rev. *G
DQ (DATA)
DQ (DATA OUT)
ADDRESS
ADDRESS
HSB (OUT)
CE
OE
V
HSB (IN)
CC
ADDRESS # 1
t
SA
ADDRESS # 1
Soft Sequence Command
t
RC
HIGH IMPEDANCE
Figure 13. OE Controlled Software STORE/RECALL Cycle
t
DATA VALID
SCE
t
DATA VALID
t
GHAX
t
GLAX
HLHX
t
HLBL
Figure 15. Soft Sequence Processing
ADDRESS # 6
Figure 14. Hardware STORE Cycle
t
DELAY
34
t
SS
t
STORE
ADDRESS # 1
ADDRESS # 6
Soft Sequence Command
t
RC
DATA VALID
t
STORE
ADDRESS # 6
“Mode Selection”
HIGH IMPEDANCE
/ t
RECALL
34
t
SS
HIGH IMPEDANCE
CY14B101K
on page 5. WE
DATA VALID
Page 21 of 24
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