HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 299

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.3.5
The DMA operation register (DMAOR) is a 16-bit read/write register that controls the DMAC
transfer mode.
This register's values are initialized to 0s by resets. The previous value is held in standby mode.
Bit
15 to 10
9
8
7 to 3
2
DMA Operation Register (DMAOR)
Bit Name
—
PR1
PR0
—
AE
Initial Value
All 0
0
0
All 0
0
R
R/W
R/W
R/W
R
R/(W)* Address Error Flag
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Priority Mode
PR1 and PR0 select the priority level between
channels when there are transfer requests for
multiple channels simultaneously.
00: CH0 > CH1 > CH2 > CH3
01: CH0 > CH2 > CH3 > CH1
10: CH2 > CH0 > CH1 > CH3
11: Round-robin
Reserved
These bits are always read as 0. The write value
should always be 0.
AE indicates that an address error occurred during
DMA transfer. If this bit is set during data transfer,
transfers on all channels are suspended. The
CPU cannot write 1 to this bit.
0: No DMAC address error. DMA transfer is
1: DMAC address error. DMA transfer is disabled.
enabled.
Clearing conditions: Writing AE = 0 after AE = 1
read, power-on reset, manual reset
Setting condition: This bit is set by occurrence
of a DMAC address error.
Rev. 4.00, 03/04, page 253 of 660