DS32EL0124SQ NSC [National Semiconductor], DS32EL0124SQ Datasheet - Page 3

• Manufacturer Part Number: DS32EL0124SQ
• Description: 125 MHz- 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface
• Manufacturer: NSC [National Semiconductor]

Pin Name
VDD33
VDD25
VDD_PLL
LF_CP
LF_REF
Exposed Pad
CML I/O
RxIN0+
RxIN0-
RxIN1+
RxIN1-
TxOUT+
TxOUT-
LVDS Parallel Data Bus
RxCLKOUT+
RxCLKOUT-
RxOUT[0:4]+/- 39, 40, 41, 42, 43, 44, 45,
Pin Descriptions
Pin Number
1, 15, 18, 36
7, 25, 35
28
27
26
49
16
17
19
20
21
22
37
38
46, 47, 48
I/O, Type
I, VDD
I, VDD
I, VDD
Analog
Analog
GND
I, CML
I, CML
O, CML
O, LVDS
O, LVDS
Description
3.3V supply
2.5V supply
3.3V supply
Loop filter capacitor connection
Loop filter ground reference
Exposed Pad must be connected to GND by 9 vias.
Non-inverting and inverting high speed CML differential inputs of the
deserializer. These inputs are internally terminated.
DS32ELX0124 only. Non-inverting and inverting high speed CML
differential inputs of the deserializer. These inputs are internally
terminated.
DS32ELX0124 only. Retimed serialized high speed output. Non-inverting
and inverting speed CML differential outputs of the deserializer. These
outputs are internally terminated.
Deserializer output clock. RxCLKOUT+/- are the non-inverting and
inverting LVDS recovered clock output pins.
Deserializer output data. RxOUT[0:4]+/- are the non-inverting and
inverting LVDS deserialized output data pins.
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