DS32EL0124SQ NSC [National Semiconductor], DS32EL0124SQ Datasheet - Page 19

• Manufacturer Part Number: DS32EL0124SQ
• Description: 125 MHz- 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface
• Manufacturer: NSC [National Semiconductor]

Typical Performance Characteristics
The eye diagrams shown below illustrate the typical perfor-
mace of the DS32ELX0124/DS32EL0124 configured with
RS = 0, DC_B = 0, for the conditions listed below each figure.
The PRBS-15 data was generated by a low cost FPGA, which
used an LMK03000C to generate the various clock frequen-
(1.25 Gbps, 40m CAT-5e, 0x000 DS32ELX0124 EQ setting,
(3.125 Gbps, 20m CAT-6 SCTP, 0x001 DS32ELX0124 EQ
setting, 0x10 DS32EL0421 De-Emphasis setting)
0x10 DS32EL0421 De-Emphasis setting)
LVDS RxCLKOUT Output
LVDS RxCLKOUT Output
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(1.25 Gbps, 40m CAT-5e, 0x000 DS32ELX0124 EQ setting,
(3.125 Gbps, 20m CAT-6 SCTP, 0x001 DS32ELX0124 EQ
cies. The data was then sent to a DS32ELX0421 configured
with RS = 0, DC_B = 0, which transmitted the data across the
specified cable type and length at the specified data rate. The
signal conditioning settings used for each measurement are
also listed below the figures.
setting, 0x10 DS32EL0421 De-Emphasis setting)
0x10 DS32EL0421 De-Emphasis setting)
LVDS RxOUT0 Output
LVDS RxOUT0 Output
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