lrs1386 Sharp Microelectronics of the Americas, lrs1386 Datasheet - Page 69

• Manufacturer Part Number: lrs1386
• Description: Flash Memory
• Manufacturer: Sharp Microelectronics of the Americas

4.3 Read Query Command
The read query mode is initiated by writing the Read
Query command (98H) to the target partition. Read
operations to that partition output the query code
(Common Flash Interface code) shown in Section 6. To
terminate the operation, write another valid command to
the partition. Once the internal WSM has started block
erase, full chip erase, (page buffer) program or OTP
program in one partition, the partition will not recognize
the Read Query command until the WSM completes its
operation or unless the WSM is suspended via the Block
Erase Suspend or (Page Buffer) Program Suspend
command. However, the Read Query command can be
accepted in other partitions except for full chip erase or
OTP program operation. Like the Read Array command,
the Read Query command functions independently of the
V
for more information about query code.
Asynchronous page mode and synchronous burst mode
are not available for reading query code. Read operations
for query code support single asynchronous read cycle or
single synchronous read cycle.
4.4 Read Status Register Command
The status register may be read to determine when block
erase, full chip erase, (page buffer) program or OTP
program has been completed and whether the operation
has been successfully completed or not (see Table 9). The
status register can be read at any time by writing the Read
Status Register command (70H) to the target partition.
Subsequent read operations to that partition output the
status register data until another valid command is
written. The status register contents are latched on the
falling edge of OE# or CE# whichever occurs later. OE#
or CE# must toggle to V
the status register latch. The Read Status Register
command functions independently of the V
RST# must be at V
PP
voltage and RST# must be at V
IH
.
Synchronous burst mode will be available for future device.
IH
before further reads to update
Appendix to Spec No.: MFM2-J13302
IH
. Refer to Section 6
PP
voltage and
FUM00701
Model No.: LRS1386
Asynchronous page mode and synchronous burst mode
are not available for reading status register. Read
operations for status register support single asynchronous
read cycle or single synchronous read cycle.
During the dual work operation, the status register data is
read from the partition which is executing block erase or
(page buffer) program operation. The memory array data
can be read from other partitions which are not executing
block erase or (page buffer) program operation. The
partition to be accessed is automatically identified
according to the input address.
4.5 Clear Status Register Command
Status register bits SR.5, SR.4, SR.3 and SR.1 that have
been set to "1"s by the WSM can only be cleared by
writing the Clear Status Register command (50H). This
command functions independently of the V
RST# must be at V
the Clear Status Register command and an address within
the target partition to the CUI.
Status register bits SR.5, SR.4, SR.3 and SR.1 indicate
various
commands (see Table 9). When erasing multiple blocks or
programming several words in sequence, clear these bits
before starting each operation. The status register bits
indicate an error for during the sequence.
After executing the Clear Status Register command, the
partition returns to read array mode. This command clears
only the status register of the addressed partition. During
block erase suspend or (page buffer) program suspend,
the Clear Status Register command is invalid and the
status register cannot be cleared.
error
March 2, 2001
conditions
IH
. To clear the status register, write
occurring
after
Rev. 2.20
PP
voltage.
writing
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