s71gs256nc0bawak0 Meet Spansion Inc., s71gs256nc0bawak0 Datasheet - Page 170

• Manufacturer Part Number: s71gs256nc0bawak0
• Description: Stacked Multi-chip Product Mcp 256/128 Megabit 16/8m X 16-bit Cmos 3.0 Volt Vcc And 1.8 V Vio Mirrorbit Tm Uniform Sector Page-mode Flash Memory With 64/32 Megabit 4/2m X 16-bit 1.8v Psram
• Manufacturer: Meet Spansion Inc.

How Extended Timings Impact CellularRAM™ Operation
170
Table 62. WRITE Timing Parameters—Asynchronous WRITE Followed by Asynchronous READ
Symbol
Symbol
Table 63. READ Timing Parameters—Asynchronous WRITE Followed by Asynchronous READ
t
t
t
t
t
t
t
t
t
t
t
CBPH
WHZ
t
t
t
t
WPH
t
t
t
OHZ
Introduction
VPH
BHZ
CEM
OLZ
BLZ
WC
WR
WP
VS
AA
HZ
OE
VP
LZ
This section describes CellularRAM™ timing requirements in systems that per-
form extended operations.
CellularRAM products use a DRAM technology that periodically requires refresh to
ensure against data corruption. CellularRAM devices include on-chip circuitry that
performs the required refresh in a manner that is completely transparent in sys-
tems with normal bus timings. The refresh circuitry imposes constraints on
timings in systems that take longer than 4µs to complete an operation. WRITE
operations are affected if the device is configured for asynchronous operation.
Both READ and WRITE operations are affected if the device is configured for page
or burst-mode operation.
Min
Min
10
10
70
70
46
10
10
10
0
5
5
70ns/80 MHz
70ns/80 MHz
A d v a n c e
Max
Max
70
20
8
8
4
8
8
CellularRAM Type 2
I n f o r m a t i o n
Min
Min
10
10
85
85
55
10
10
10
0
5
5
85ns/66 MHz
85ns/66 MHz
Max
Max
85
20
8
8
4
8
8
cellRAM_00_A0 October 4, 2004
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns