am79c970 Advanced Micro Devices, am79c970 Datasheet - Page 112

• Manufacturer Part Number: am79c970
• Description: Pcnettm-pci Single-chip Ethernet Controller For Pci Local Bus
• Manufacturer: Advanced Micro Devices

5
4
3
2
1
0
BCR5: LED1 Status
Bit
RXPOLE
RCVME
XMTE
RCVE
COLE
JABE
Name
A value of 0 disables the signal.
A value of 1 enables the signal.
Receive Match status Enable. In-
dicates receive activity on the
network that has passed the ad-
dress match function for this
node. All address matching
modes are included: Physical,
Logical filtering, Promiscuous
and Broadcast.
A value of 0 disables the signal.
A value of 1 enables the signal.
Transmit status Enable. Indi-
cates
transmit activity.
A value of 0 disables the signal.
A value of 1 enables the signal.
Receive Polarity status Enable.
Indicates the current Receive
Polarity condition on the Twisted
Pair interface. A value of ONE in-
dicates that the polarity of the
RXD pair has been reversed. A
value of ZERO indicates that the
polarity of the RXD pair has not
been reversed.
Receive polarity indication is
valid only if the T-MAU is in Link
Pass state.
A value of 0 disables the signal.
A value of 1 enables the signal.
Receive status Enable. Indicates
receive activity on the network.
A value of 0 disables the signal.
A value of 1 enables the signal.
Jabber status Enable. Indicates
that the PCnet-PCI controller is
jabbering on the network.
A value of 0 disables the signal.
A value of 1 enables the signal.
Collision status Enable. Indi-
cates collision activity on the net-
work.
A value of 0 disables the signal. A
value of 1 enables the signal.
Description
BCR5 controls the function(s)
that the LED1 pin displays. Multi-
ple functions can be simultane-
ously enabled on this LED pin.
The LED display will indicate the
logical OR of the enabled func-
tions. BCR1 defaults to Receive
Status
stretcher enabled (PSE = 1) and
is fully programmable.
PCnet-PCI
(RCV)
with
controller
P R E L I M I N A R Y
pulse
Am79C970
31–16 RES
15
14
13
12–8
7
LEDOUT
LEDPOL
LEDDIS
RES
PSE
The default setting after H_RE-
SET for the LED1 register is
0084h. The LED1 register value
is unaffected by S_RESET or
STOP.
Reserved locations. Written as
ZERO and read as undefined.
This bit indicates the current
(non-stretched) value of the LED
output pin. A value of ONE in this
bit indicates that the OR of the
enabled signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(Bits 6–0).
This bit is READ only by the host,
and is unaffected by H_RESET,
S_RESET or STOP.
LED Polarity. When this bit has
the value ZERO, then the LED
pin will be driven to a LOW level
whenever the OR of the enabled
signals is true and the LED pin
will be disabled and allowed to
float high whenever the OR of the
enabled signals is false. (i.e. the
LED output will be an Open Drain
output and the output value will
be the inverse of the LEDOUT
status bit.)
When this bit has the value ONE,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false. (i.e.
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit.)
The setting of this bit will not af-
fect the polarity of the LEDOUT
bit for this register.
LED Disable. This bit is used to
disable the LED output. When
LEDDIS has the value ONE, then
the LED output will always be
tristated. When LEDDIS has the
value ZERO, then the LED out-
put value will be governed by the
LEDOUT and LEDPOL values.
Reserved locations. Write as ZE-
ROS, read as undefined.
A value of 0 disables the signal.
A value of 1 enables the signal.
Pulse Stretcher Enable. Extends
the LED illumination time for
AMD
1-979