zl50023 Zarlink Semiconductor, zl50023 Datasheet - Page 72

• Manufacturer Part Number: zl50023
• Description: Enhanced 4 K Channel Tdm Switch With Rate Conversion
• Manufacturer: Zarlink Semiconductor

† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
AC Electrical Characteristics
tion testing.
1
Output Frame Boundary
(4.096 MHz)
16.384 Mbps
2.048 Mbps
4.096 Mbps
8.192 Mbps
STio Delay - Active to Active
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
@2.048 Mbps
@4.096 Mbps
@8.192 Mbps
@16.384 Mbps
STio0 - 15
STio0 - 15
STio0 - 15
STio0 - 15
CKo0
FPo0
Figure 31 - ST-BUS Output Timing Diagram when Operated at 2, 4, 8 or 16 Mbps
Characteristic
Ch255
Bit2
Ch255
Bit1
Ch63
Bit0
Ch31
Bit0
Ch127
Ch255
Bit0
Bit0
†
- ST-BUS/GCI-Bus Output Timing
Bit7
Ch0
t
SOD16
t
Bit7
Ch0
SOD8
Bit6
Ch0
t
t
t
t
t
t
t
t
t
Sym.
SOD16
SOD16
SOD4
SOD2
SOD4
SOD8
SOD2
SOD4
SOD8
t
SOD2
Bit7
Ch0
Bit5
Ch0
Zarlink Semiconductor Inc.
Ch0
Bit6
Bit4
Ch0
ZL50023
Min.
-6
-6
-6
-6
0
0
0
0
Bit3
Ch0
Bit7
Ch0
Bit5
Ch0
72
Typ.
Ch0
Bit2
Bit6
Ch0
‡
Ch0
Ch0
Bit1
Bit4
Max.
Bit0
Ch0
6
6
6
6
0
0
0
0
Bit3
Ch0
Bit7
Ch1
Units
Bit6
Ch1
Bit5
Ch0
ns
ns
ns
ns
ns
ns
ns
ns
Bit2
Ch0
Bit5
Ch1
C
Multiplied Clock Mode
Divided Clock Mode
L
Bit4
Ch1
= 30 pF
Ch0
Bit6
Bit1
Ch0
Test Conditions
Bit3
Ch1
Bit4
Ch0
Bit2
Ch1
Ch0
Bit0
Ch1
Bit1
Data Sheet
V
V
V
V
CT
CT
CT
CT