zl50023 Zarlink Semiconductor, zl50023 Datasheet - Page 65

• Manufacturer Part Number: zl50023
• Description: Enhanced 4 K Channel Tdm Switch With Rate Conversion
• Manufacturer: Zarlink Semiconductor

† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
AC Electrical Characteristics
Note 1:
Note 2:
10 Acknowledgement delay time.
12 RDY drive low to HiZ
11 Acknowledgement hold time.
tion testing.
1
2
3
4
5
6
7
8
9
CS
WR
RD
A0-A13
D0-D15
RDY
CS de-asserted time
WR setup to CS falling
RD setup to CS falling
Address setup to CS falling
Data setup to CS falling
WR hold after CS rising
RD hold after CS rising
Address hold after CS rising
Data hold after CS rising
From CS low to RDY high:
From CS high to RDY low
Registers
Memory
High impedance is measured by pulling to the appropriate rail with R
discharge C
A delay of 500 µs to 2 ms (Section 13.2 on page 33) must be applied before the first microprocessor access is performed
after the RESET pin is set high.
Characteristics
L
.
Figure 23 - Intel Non-Multiplexed Bus Timing - Write Access
†
- Intel Non-Multiplexed Bus Mode - Write Access
t
CSD
Sym.
t
t
t
t
t
t
Zarlink Semiconductor Inc.
CSD
t
t
t
t
t
t
AKD
AKH
AKZ
WS
WH
RS
DS
RH
AH
DH
AS
t
t
t
WS
AS
RS
ZL50023
Min.
15
10
10
10
65
5
0
0
0
5
4
t
DS
Typ.
VALID ADDRESS
t
AKD
VALID WRITE DATA
‡
L
, with timing corrected to cancel time taken to
Max.
150
55
12
8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
AH
AKH
t
DH
C
C
(Note 1)
C
C
C
(Note 1)
t
t
WH
RH
L
L
L
L
L
Test Conditions
t
= 50 pF
= 50 pF, R
= 50 pF
= 50 pF
= 50 pF, R
AKZ
Data Sheet
V
V
V
V
V
V
CT
CT
CT
CT
L
L
CT
CT
= 1K
= 1K
2