zl50023 Zarlink Semiconductor, zl50023 Datasheet - Page 45

• Manufacturer Part Number: zl50023
• Description: Enhanced 4 K Channel Tdm Switch With Rate Conversion
• Manufacturer: Zarlink Semiconductor

Note: In Divided Clock modes, CKo3 - 1 cannot exceed frequency of CKi.
External Read/Write Address: 0004
Reset Value: 0000
15
0
Bit
5
4
3
2
1
0
Table 17 - Output Clock and Frame Pulse Selection Register (OCFSR) Bits (continued)
14
0
FPO1POS
FPO0POS
CKO1P
CKO0P
FPO1P
FPO0P
Name
FPO3
SEL1
CKO
H
13
FPO3
SEL0
CKO
12
Output Clock (CKo1) Polarity Selection
When this bit is low, the output clock CKo1 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo1 rising edge aligns with the
frame boundary.
Output Frame Pulse (FPo1) Polarity Selection
When this bit is low, the output frame pulse FPo1 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo1 has the positive frame pulse format.
Output Frame Pulse (FPo1) Position
When this bit is low, FPo1 straddles frame boundary (as defined by ST-BUS).
When this bit is high, FPo1 starts from frame boundary (as defined by GCI-Bus).
Output Clock (CKo0) Polarity Selection
When this bit is low, the output clock CKo0 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo0 rising edge aligns with the
frame boundary.
Output Frame Pulse (FPo0) Polarity Selection
When this bit is low, the output frame pulse FPo0 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo0 has the positive frame pulse format.
Output Frame Pulse (FPo0) Position
When this bit is low, FPo0 straddles frame boundary (as defined by ST-BUS).
When this bit is high, FPo0 starts from frame boundary (as defined by GCI-Bus).
CKO3
H
11
P
FPO3
10
P
FPO3
POS
9
Zarlink Semiconductor Inc.
ZL50023
CKO2
P
8
45
FPO2
7
P
Description
FPO2
POS
6
CKO1
P
5
FPO1
4
P
FPO1
POS
3
CKO0
P
2
Data Sheet
FPO0
P
1
FPO0
POS
0