tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 40

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tmp89fm82t

Manufacturer Part Number
tmp89fm82t
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
2.3
System clock controller
RA000
2.3.5
2.3.4.2
Note 2: The clock output from the oscillation circuit is used as the input clock to the warm-up counter. The warm-up time contains
To use PMD, it is necessary to operate the PLL beforehand. The PLL triples high-speed oscilltion frequency, fc,
from the high-speed oscillator and generates fpll = 3 × fc. The PLL supplies this as an operation clock fx of PMD.
The PMD of TMP89FM82T operates at fx = 24MHz, so set the system clock frequency to 8MHz.
register PLLCR0, PLLCR1.
the operation clock is supplied to PMD. This time is called the Lock-Up time. The initialized value of the Lock-
Up time is about 1ms at fc = 8MHz.
Clock multiplier (PLL)
The clock multiplier (PLL) is the circuit that generates the operation clock of the Programmable motor diver.
When a reset is released, PLL is initialized and stopped. The operation is controlled by the setting of PLL
PLL is not stable immideately after the start. Therefore, after the time counted with the Lock-Up circuit passes,
oscillation becomes stable, at a mode change from NORMAL1 to NORMAL2 or from SLOW1 to SLOW2.
stopped oscillation circuit to start oscillation and the 14-stage counter to start counting the selected input
clock.
is stopped and the counter is cleared.
WUCCR<WUCRST> is cleared to "0".
restart the warm-up operation, SYSCR2<XEN> or SYSCR2<XTEN> must be cleared to "0".
errors because the oscillation frequency is unstable until the oscillation circuit becomes stable. Set the sufficient time for
the oscillation start property of the oscillator.
The warm-up counter serves to secure the time after the oscillation is enabled by the software before the
Select the input clock to the frequency division circuit at WUCCR<WUCSEL>.
Select the input clock to the 14-stage counter at WUCCR<WUCDIV>.
After the warm-up time is set at WUCDR, setting SYSCR2<XEN> or SYSCR2<XTEN> to "1" allows the
When the upper 8 bits of the counter become equal to WUCDR, an INTWUC interrupt occurs, counting
Set WUCCR<WUCRST> to "1" to discontinue the warm-up operation.
By setting it to "1", the count-up operation is stopped, the warm-up counter is cleared, and
SYSCR2<XEN> and SYSCR2<XTEN> hold the values when WUCCR<WUCRST> is set to "1". To
Warm-up counter operation when the oscillation is enabled by the software
Note:The warm-up counter starts counting when SYSCR2<XEN> or SYSCR2<XTEN> is changed from "0"
Note:The clock output from the oscillation circuit is used as the input clock to the warm-up counter. The
to "1". The counter will not start counting by writing "1" to SYSCR2<XEN> or SYSCR2<XTEN> when
it is in the state of "1".
warm-up time contains errors because the oscillation frequency is unstable until the oscillation circuit
becomes stable. Set the sufficient time for the oscillation start property of the oscillator.
<WUCSEL>
WUCCR
0
1
<WUCDIV>
WUCCR
00
01
10
11
00
01
10
11
Counter input
Page 24
fc / 2
fc / 2
fs / 2
fs / 2
clock
fc / 2
fs / 2
fc
fs
2
3
2
3
2
2
2
2
2
2
2
2
6
7
8
9
6
7
8
9
/ fc to 255 x 2
/ fc to 255 x 2
/ fc to 255 x 2
/ fc to 255 x 2
/ fs to 255 x 2
/ fs to 255 x 2
/ fs to 255 x 2
/ fs to 255 x 2
Warm-up time
6
7
8
9
6
7
8
9
/ fc
/ fc
/ fc
/ fc
/ fs
/ fs
/ fs
/ fs
TMP89FM82T

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