tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 93
tmp89fm82t
Manufacturer Part Number
tmp89fm82t
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM82T.pdf
(458 pages)
- Current page: 93 of 458
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RA000
8-bit up counter monitor
Watchdog timer status
(0x0FD6)
(0x0FD7)
WDCNT
WDST
Note:WDCDR is a write-only register and must not be accessed by using a read-modify-write instruction, such as a
Note 1: WDST<WINTST2> and WDST<WINTST1> are cleared to "0" by reading WDST.
Note 2: Values after reset are read from bits 7 to 3 of WDST.
bit operation.
WINTST2
WINTST1
WDCNT
WDTST
Read/Write
Read/Write
Bit Symbol
Bit Symbol
After reset
After reset
Monitors the count value of the 8-bit
up counter
Watchdog timer interrupt request
signal factor status 2
Watchdog timer interrupt request
signal factor status 1
Watchdog timer operating state sta-
tus
R
7
0
7
0
-
R
6
0
6
1
-
R
5
0
The count value of the 8-bit up counter is read.
5
0
-
Page 77
0 :
1 :
0 :
1 :
0 :
1 :
No watchdog timer interrupt request signal has occurred.
A watchdog timer interrupt request signal has occurred due to the overflow
of the 8-bit up counter.
No watchdog timer interrupt request signal has occurred.
A watchdog timer interrupt request signal has occurred due to releasing of
the 8-bit up counter outside the clear time.
Operation disabled
Operation enabled
R
4
0
4
1
-
WDCNT
R
R
1
3
0
3
-
WINTST2
R
2
0
2
0
WINTST1
R
1
0
1
0
TMP89FM82T
WDTST
R
0
0
0
1
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