tmp89fm82t TOSHIBA Semiconductor CORPORATION, tmp89fm82t Datasheet - Page 12

• Manufacturer Part Number: tmp89fm82t
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

17. Serial Expansion Interface (SEI)
18. Key-on Wakeup (KWU)
vi
16.1 Configuration.......................................................................................................................240
16.2 Control.................................................................................................................................241
16.3 Low Power Consumption Function.....................................................................................244
16.4 Functions..............................................................................................................................245
16.5 Transfer Modes....................................................................................................................247
16.6 AC Characteristics...............................................................................................................261
17.1 Features ...............................................................................................................................263
17.2 SEI Registers ......................................................................................................................264
17.3 SEI Operation .....................................................................................................................266
17.4 SEI Pin Functions ...............................................................................................................267
17.5 SEI Transfer Formats ..........................................................................................................269
17.6 Functional Description.........................................................................................................271
17.7 Interrupt Generation ............................................................................................................272
17.8 SEI System Errors ...............................................................................................................272
17.9 Bus Driver Protection .........................................................................................................273
17.10 Flow chart .........................................................................................................................274
18.1 Configuration.......................................................................................................................277
16.4.1
16.4.2
16.4.3
16.5.1
16.5.2
16.5.3
17.2.1
17.2.2
17.2.3
17.3.1
17.3.2
17.4.1
17.4.2
17.4.3
17.5.1
17.5.2
17.8.1
17.8.2
17.8.3
17.8.4
16.5.1.1
16.5.1.2
16.5.1.3
16.5.1.4
16.5.1.5
16.5.2.1
16.5.2.2
16.5.2.3
16.5.2.4
16.5.3.1
16.5.3.2
16.5.3.3
16.5.3.4
16.5.3.5
17.2.1.1
Transfer format..............................................................................................................................................................245
Serial clock....................................................................................................................................................................245
Transfer edge selection..................................................................................................................................................245
8-bit transmit mode........................................................................................................................................................247
8-bit Receive Mode........................................................................................................................................................252
8-bit transmit/receive mode...........................................................................................................................................256
SEI Control Register (SECR)........................................................................................................................................264
SEI Status Register (SESR)...........................................................................................................................................265
SEI Data Register (SEDR).............................................................................................................................................265
Controlling SEI clock polarity and phase .....................................................................................................................266
SEI data and clock timing .............................................................................................................................................266
SECLK pin ....................................................................................................................................................................267
MISO/MOSI pins ..........................................................................................................................................................267
SS pin ............................................................................................................................................................................267
CPHA (SECR register bit 2) = 0 format .......................................................................................................................269
CPHA = 1 format ..........................................................................................................................................................270
Mode fault error ............................................................................................................................................................272
Write collision error.......................................................................................................................................................272
Overflow error ..............................................................................................................................................................273
Transfer error ................................................................................................................................................................273
Setting
Starting the transmit operation
Transmit buffer and shift operation
Operation on completion of transmission
Stopping the transmit operation
Setting
Starting the receive operation
Operation on completion of reception
Stopping the receive operation
Setting
Starting the transmit/receive operation
Transmit buffer and shift operation
Operation on completion of transmission/reception
Stopping the transmit/receive operation
Transfer rate