lh28f800bg-l Sharp Microelectronics of the Americas, lh28f800bg-l Datasheet - Page 34

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lh28f800bg-l

Manufacturer Part Number
lh28f800bg-l
Description
M-bit Smartvoltage Flash Memories
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
6.2.6 ALTERNATIVE CE#-CONTROLLED WRITES
NOTES :
1. In systems where CE# defines the write pulse width
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid A
SYMBOL
• V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
PHHEH
SHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
QVSL
CC
(within a longer WE# timing waveform), all setup, hold,
and inactive WE# times should be measured relative to
the CE# waveform.
word write.
= 2.7 to 3.6 V, T
Write Cycle Time
RP# High Recovery to CE# Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
WP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RP# V
WP# V
PP
PP
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
HH
HH
IH
IH
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
A
= 0 to +70˚C or –40 to +85
PARAMETER
VERSIONS
IN
and D
IN
for block erase or
˚
C
- 34 -
NOTE
2, 4
2, 4
2, 4
2
2
2
2
3
3
4. V
(NOTE 1)
LH28F800BG-L/BGH-L (FOR TSOP, CSP)
should be held at V
or word write success (SR.1/3/4/5 = 0 : on Boot Blocks,
SR.3/4/5 = 0 : on Parameter Blocks and Main Blocks).
LH28F800BGH-L85
PP
LH28F800BG-L85
MIN.
120
100
100
100
70
50
50
25
1
0
5
5
0
0
should be held at V
0
0
0
MAX.
100
HH
) until determination of block erase
PPH1/2/3
LH28F800BGH-L12 UNIT
LH28F800BG-L12
MIN.
150
100
100
100
70
50
50
25
1
0
5
5
0
0
0
0
0
(and if necessary RP#
MAX.
100
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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