lh28f800bg-l Sharp Microelectronics of the Americas, lh28f800bg-l Datasheet
lh28f800bg-l
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lh28f800bg-l Summary of contents
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... For secure code storage applications, such as networking, where code is either directly executed out of flash or downloaded to DRAM, the LH28F800BG-L/BGH-L offer two levels of protection : absolute protection with V PP hardware boot block locking. These alternatives give designers ultimate control of their code security needs ...
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... COMPARISON TABLE OPERATING VERSIONS TEMPERATURE LH28F800BG +70°C (FOR TSOP, CSP) LH28F800BGH-L –40 to +85°C (FOR TSOP, CSP) 1 LH28F800BG +70°C (FOR SOP) 1 Refer to the datasheet of LH28F800BG-L (FOR SOP). PIN CONNECTIONS 48-PIN TSOP (Type ...
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... BUFFER ADDRESS X LATCH DECODER ADDRESS COUNTER LH28F800BG-L/BGH-L (FOR TSOP, CSP) Parameter Blocks : The boot block architecture includes parameter blocks to facilitate storage of frequently update small parameters that would normally require an EEPROM. By using software techniques, EEPROMs can be emulated. Each boot block component contains six parameter blocks words (4 096 words) each ...
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... GND SUPPLY GROUND : Do not float any ground pins CONNECT : Lead is not internal connected; recommend to be floated. LH28F800BG-L/BGH-L (FOR TSOP, CSP) NAME AND FUNCTION produce spurious results and should not be attempted. HH ≤ memory contents cannot be altered. Block erase and ...
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... V V consumes approximately one-fifth the CC power and 3 approximately one-fourth the power LH28F800BG-L/BGH-L (FOR TSOP, CSP) But performance. V eliminates the need for a separate 12 V converter, while maximizes block erase and word PP = write performance. In addition to flexible erase and ...
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... LH28F800BG-L/BGH-L (FOR TSOP, CSP) The access time voltage range of 4.75 to 5.25 V over the temperature range +70°C (LH28F800BG-L)/ – +85°C (LH28F800BGH-L). At 4 order the access time 120 ns ...
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... Main Block 10000 0FFFF 32 k-Word Main Block 08000 07FFF 32 k-Word Main Block 00000 NOTES : BLOCK CONFIGURATION LH28F800BG-TL Top Boot LH28F800BGH-TL LH28F800BG-BL Bottom Boot LH28F800BGH-BL LH28F800BG-L/BGH-L (FOR TSOP, CSP) 7FFFF 0 78000 77FFF 1 70000 6FFFF 0 68000 67FFF 1 60000 5FFFF 2 58000 57FFF ...
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... Read Array command. Block erase suspend allows system software to suspend a block erase to read/write data from/to blocks other than that which is suspended. Word write suspend allows system LH28F800BG-L/BGH-L (FOR TSOP, CSP) software to suspend a word write to read data from any other flash memory array location. 2.1 Data Protection ...
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... RP# goes to logic-high (V IH command can be written. As with any automated device important to LH28F800BG-L/BGH-L (FOR TSOP, CSP) assert RP# during system reset. When the system comes out of reset, it expects to read from the flash memory. Automated flash memories provide status information when accessed during block erase ...
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... when the WSM is not busy, in block erase suspend mode (with word write inactive), word write suspend mode or deep power-down mode. LH28F800BG-L/BGH-L (FOR TSOP, CSP) 4 COMMAND DEFINITIONS When the V from the status register, identifier codes, or blocks are enabled ...
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... ID = Data read from identifier codes. 4. Following the Read Identifier Codes command, read operations access manufacture and device codes. See Section 4.2 for read identifier code data. LH28F800BG-L/BGH-L (FOR TSOP, CSP) Table 3 Command Definitions FIRST BUS CYCLE NOTE (NOTE 1) (NOTE 2) ’ ...
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... The status register contents are latched on LH28F800BG-L/BGH-L (FOR TSOP, CSP) the falling edge of OE# or CE#, whichever occurs. OE# or CE# must toggle update the status register latch. The Read Status ...
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... WSM verify only detects errors for "1"s that do not successfully write to "0"s. The CUI remains in read status register mode until it receives another command. LH28F800BG-L/BGH-L (FOR TSOP, CSP) Reliable word writes can only occur when V V and V CC1/2/3/4 this high voltage, memory contents are protected against word writes ...
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... RY/BY# will return After the Word Write Resume command is OL LH28F800BG-L/BGH-L (FOR TSOP, CSP) written, the device automatically outputs status register data when read (see Fig. 6). V remain at V word write) while in word write suspend mode. RP# must also remain at V level used for word write) ...
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... PP SR.2 = WORD WRITE SUSPEND STATUS (WWSS Word Write Suspended 0 = Word Write in Progress/Completed SR.1 = DEVICE PROTECT STATUS (DPS WP# or RP# Lock Detected, Operation Abort 0 = Unlock SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R) LH28F800BG-L/BGH-L (FOR TSOP, CSP) EFFECT Table 6 Status Register Definition WWS VPPS 4 3 NOTES : Check RY/BY# or SR.7 to determine block erase or word write completion ...
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... Command Sequence SR. Error 0 1 Block Erase SR.5 = Error 0 Block Erase Successful Fig. 3 Automated Block Erase Flowchart LH28F800BG-L/BGH-L (FOR TSOP, CSP) BUS COMMAND COMMENTS OPERATION Data = 20H Write Erase Setup Addr = Within Block to be Erased Erase Data = D0H Write Confirm Addr = Within Block to be Erased ...
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... SR.1 = Device Protect Error 0 1 SR.4 = Word Write Error 0 Word Write Successful Fig. 4 Automated Word Write Flowchart LH28F800BG-L/BGH-L (FOR TSOP, CSP) BUS COMMAND COMMENTS OPERATION Setup Data = 40H or 10H Write Word Write Addr = Location to be Written Data = Data to be Written Write ...
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... Word Write? Read Array Data Word Write Loop No Done? Yes Write D0H Write FFH Block Erase Resumed Array Data Fig. 5 Block Erase Suspend/Resume Flowchart LH28F800BG-L/BGH-L (FOR TSOP, CSP) BUS COMMAND OPERATION Erase Write Suspend Read Standby Standby Erase Write Resume ...
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... Read Array Data No Done Reading Yes Write D0H Write FFH Read Word Write Resumed Array Data Fig. 6 Word Write Suspend/Resume Flowchart LH28F800BG-L/BGH-L (FOR TSOP, CSP) BUS COMMAND COMMENTS OPERATION Word Write Data = B0H Write Suspend Addr = X Status Register Data Read Addr = X Check SR ...
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... LH28F800BG-L/BGH-L (FOR TSOP, CSP) and transient peaks produced by falling and rising edges of CE# and OE#. Transient current magnitudes depend on the device outputs’ capacitive and inductive loading. Two-line control and proper decoupling capacitor selection will suppress transient voltage peaks ...
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... WP# provides additional protection from inadvertent code or data alteration. The device is disabled while RP regardless of its control inputs IL state. LH28F800BG-L/BGH-L (FOR TSOP, CSP) 5.7 Power Consumption or CE# PP When designing portable systems, designers must consider battery power consumption not only during device operation, but also for data retention during ...
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... Supply Voltage (5.0±0.5 V) CC4 CC NOTE : 1. Test condition : Ambient temperature LH28F800BG-L/BGH-L (FOR TSOP, CSP) NOTICE : The specifications are subject to change without notice. Verify with your local SHARP sales office that you have the latest datasheet before finalizing a design. WARNING : Stressing the device beyond the ...
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... Fig. 8 Transient Input/Output Reference Waveform for V V 2.4 INPUT 0.45 AC test inputs are driven at V begins and V IH TTL 90%) < 10 ns. Fig. 9 Transient Input/Output Reference Waveform for LH28F800BG-L/BGH-L (FOR TSOP, CSP + MHz ˚ A TYP. MAX 1.35 TEST POINTS 1 ...
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... Includes Jig L Capacitance Fig. 10 Transient Equivalent Testing Load Circuit LH28F800BG-L/BGH-L (FOR TSOP, CSP) Test Configuration Capacitance Loading Value TEST CONFIGURATION V = 3.3±0.3 V, 2 (NOTE 5.0±0. 5.0±0 NOTE : 1. Applied to high-speed products, LH28F800BG-L85 and LH28F800BGH-L85. OUT - (pF 100 ...
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... PP I PPD Current I V Word Write Current PPW Block Erase Current PPE Word Write or Block PPWS PP I Erase Suspend Current PPES LH28F800BG-L/BGH-L (FOR TSOP, CSP 2 5.0±0 NOTE TYP. MAX. TYP. 1 ±0.5 1 ±0 0.2 2 0.4 4 ...
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... Block erases and word writes are inhibited when and not guaranteed in the range between V PPLK (max.) and V (min.), between V PPH1 V (min.), between V (max.) and V PPH2 PPH2 and above V (max.). PPH3 LH28F800BG-L/BGH-L (FOR TSOP, CSP 2 5.0±0 NOTE MIN. MAX. MIN. 7 –0.5 0.8 –0.5 V ...
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... OE# Change, Whichever Occurs First NOTES : 1. See AC Input/Output Reference Waveform (Fig. 7 through Fig. 9) for maximum allowable input slew rate. 2. OE# may be delayed ELQV 3. Sampled, not 100% tested. LH28F800BG-L/BGH-L (FOR TSOP, CSP –40 to +85 C ˚ ˚ LH28F800BG-L85 LH28F800BGH-L85 NOTE MIN ...
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... CE# without impact on t ELQV 3. Sampled, not 100% tested. 4. See Fig. 8 "Transient Input/Output Reference Waveform" and Fig. 10 "Transient Equivalent Testing Load Circuit" (High Speed Configuration) for testing characteristics. LH28F800BG-L/BGH-L (FOR TSOP, CSP +70˚C or –40 to +85 C ˚ (NOTE 4) LH28F800BG-L85 V ± ...
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... WE# ( High Z DATA (D/Q) (DQ - RP# ( Fig Waveform for Read Operations LH28F800BG-L/BGH-L (FOR TSOP, CSP) Device Data Valid Address Selection Address Stable t AVAV t GLQV t ELQV t GLQX t ELQX Valid Output t AVQV t PHQV - EHQZ ...
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... Refer to Section 6.2.4 "AC CHARAC- TERISTICS" for read-only operations. 2. Sampled, not 100% tested. 3. Refer to Table 3 for valid A and D IN word write. LH28F800BG-L/BGH-L (FOR TSOP, CSP) (NOTE –40 to +85 C ˚ ˚ LH28F800BG-L85 LH28F800BGH-L85 NOTE MIN ...
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... Read timing characteristics during block erase and word write operations are the same as during read-only operations. Refer to Section 6.2.4 "AC CHARAC- TERISTICS" for read-only operations. 2. Sampled, not 100% tested. 3. Refer to Table 3 for valid A and D IN word write. LH28F800BG-L/BGH-L (FOR TSOP, CSP) C ˚ LH28F800BG-L85 LH28F800BGH-L85 NOTE MIN. 100 2 ...
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... V (and if necessary RP# PP PPH1/2/3 should be held until determination of block erase HH or word write success (SR.1/3/4 Boot Blocks, SR.3/4 Parameter Blocks and Main Blocks). LH28F800BG-L/BGH-L (FOR TSOP, CSP +70˚C or –40 to +85 C ˚ (NOTE 5) LH28F800BG-L85 V ±0. ...
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... Write block erase or word write setup. 3. Write block erase confirm or valid address and data. 4. Automated erase or program delay. 5. Read status register data. 6. Write Read Array command. Fig Waveform for WE#-Controlled Write Operations LH28F800BG-L/BGH-L (FOR TSOP, CSP) (NOTE 3) (NOTE 4) (NOTE ...
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... In systems where CE# defines the write pulse width (within a longer WE# timing waveform), all setup, hold, and inactive WE# times should be measured relative to the CE# waveform. 2. Sampled, not 100% tested. 3. Refer to Table 3 for valid A and D IN word write. LH28F800BG-L/BGH-L (FOR TSOP, CSP) (NOTE 1) C ˚ LH28F800BG-L85 LH28F800BGH-L85 NOTE MIN. 120 ...
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... In systems where CE# defines the write pulse width (within a longer WE# timing waveform), all setup, hold, and inactive WE# times should be measured relative to the CE# waveform. 2. Sampled, not 100% tested. 3. Refer to Table 3 for valid A and D IN word write. LH28F800BG-L/BGH-L (FOR TSOP, CSP) C ˚ LH28F800BG-L85 LH28F800BGH-L85 NOTE MIN. 100 2 ...
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... V (and if necessary RP# PP PPH1/2/3 should be held until determination of block erase HH or word write success (SR.1/3/4 Boot Blocks, SR.3/4 Parameter Blocks and Main Blocks). LH28F800BG-L/BGH-L (FOR TSOP, CSP +70˚C or –40 to +85 C ˚ (NOTE 5) LH28F800BG-L85 V ±0. ...
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... Write block erase or word write setup. 3. Write block erase confirm or valid address and data. 4. Automated erase or program delay. 5. Read status register data. 6. Write Read Array command. Fig Waveform for CE#-Controlled Write Operations LH28F800BG-L/BGH-L (FOR TSOP, CSP) (NOTE 3) (NOTE 4) (NOTE ...
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... These specifications are valid for all product versions (packages and speeds RP# is asserted while a block erase or word write operation is not executing, the reset will complete within 100 ns. LH28F800BG-L/BGH-L (FOR TSOP, CSP) PLPH (A) Reset During Read Array Mode t PLRH PLPH ...
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... EHRH1 t Erase Suspend Latency WHRH2 t Time to Read EHRH2 NOTES : 1. Typical values measured +25˚C and nominal A voltages. Subject to change based on device characterization. 2. Excludes system-level overhead. LH28F800BG-L/BGH-L (FOR TSOP, CSP) C ˚ 2 5.0±0 (NOTE 1) MIN. TYP. MAX. MIN. TYP ...
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... EHRH1 t WHRH2 Erase Suspend Latency Time to Read t EHRH2 NOTES : 1. Typical values measured +25˚C and nominal A voltages. Subject to change based on device characterization. 2. Excludes system-level overhead. LH28F800BG-L/BGH-L (FOR TSOP, CSP +70˚C or –40 to +85 C ˚ NOTE MIN. TYP ...
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... Blank = – + OPTION ORDER CODE 1.35 V I/O Levels 1 LH28F800BGXX-XL85 2 LH28F800BGXX-XL12 LH28F800BG-L/BGH-L (FOR TSOP, CSP Access Speed (ns (5.0 0.25 V (5.0 0 120 ns (5.0 0.5 V), 130 ns (3.3 0.3 V), Block Locate Option T = Top Boot B = Bottom Boot Package E = 48-pin TSOP (I) (TSOP048-P-1220) Normal bend ...
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TSOP (TSOP048-P-1220 20.0 0.3 18.4 0.2 Package base plane 0.1 19.0 PACKAGING ...
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CSP (FBGA048-P-0808) 0.1 S 0.8 0 0.1 S TYP. 0 0.2 8 TYP. TYP 1.2 0.03 0. PACKAGING Land hole ...