w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 122

• Manufacturer Part Number: w83627sf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

13.4 Logical Device 2 (UART A)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0xF8 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x04 if PNPCSV = 0 during POR, default 0x00 otherwise)
CRF0 (Default 0x00)
13.5 Logical Device 3 (UART B)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x02, 0xF8 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x03 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select Serial Port 1 I/O base address [0x100:0xFF8] on 8 byte boundary.
These two registers select Serial Port 2 I/O base address [0x100:0xFF8] on 8 byte boundary.
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit 3 - 0 : These bits select IRQ resource for Serial Port 1.
Bit 7 - 2 : Reserved.
Bit 1 - 0 : SUACLKB1, SUACLKB0
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit [3:0] : These bits select IRQ resource for Serial Port 2.
: = 1 Activates the logical device.
= 0 Logical device is inactive.
= 00
= 01
= 10
= 11
= 1 Activates the logical device.
= 0 Logical device is inactive.
UART A clock source is 1.8462 MHz (24MHz/13)
UART A clock source is 2 MHz (24MHz/12)
UART A clock source is 24 MHz (24MHz/1)
UART A clock source is 14.769 MHz (24MHz/1.625)
- 115 -
Publication Release Date: Nov. 2000
PRELIMINARY
W83627SF
Revision 0.60