w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 103

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w83627sf

Manufacturer Part Number
w83627sf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
11.5 Smart Card FIFO Control Register (SCFR, write only at "base address + 2")
This register is used to control the FIFO functions of Smart Card interface.
Bit 6, 7: These two bits are used to set the active level for the receiver FIFO interrupt. For example, if
FIFO TRIGGER LEVEL
Bit 5 - 3: Reserved.
Bit 2: Setting this bit to a logical 1 resets the TX FIFO counter logic to initial state. This bit will be
Bit 1: Setting this bit to a logical 1 resets the RX FIFO counter logic to initial state. This bit will be
Bit 0: This bit enables FIFO of Smart Card interface. This bit should be set to a logical 1 before other
BIT 7
the interrupt active level is set as 4 bytes, once there are more than 4 data characters in the
receiver FIFO, the interrupt will be activated to notify the CPU to read the data from the FIFO.
0
0
1
1
cleared to a logical 0 by itself after being set to a logical 1.
cleared to a logical 0 by itself after being set to a logical 1.
bits of SCFR are programmed.
7
BIT 6
6
0
1
0
1
5
4
RX FIFO INTERRUPT ACTIVE LEVEL (BYTES)
3
2
1
0
FIFO enable
Receiver FIFO reset
Transmitter FIFO reset
RX interrupt active level (LSB)
RX interrupt active level (MSB)
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01
04
08
14
Publication Release Date: Nov. 2000
PRELIMINARY
W83627SF
Revision 0.60

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