cp3ub26 National Semiconductor Corporation, cp3ub26 Datasheet - Page 50

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cp3ub26

Manufacturer Part Number
cp3ub26
Description
Reprogrammable Connectivity Processor With Usb And Can Interfaces
Manufacturer
National Semiconductor Corporation
Datasheet

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10.4
Table 20 shows the interrupts assigned to various on-chip
maskable interrupts. The priority of simultaneous maskable
interrupts is linear, with IRQ47 having the highest priority.
IRQ Number
IRQ47
IRQ46
IRQ45
IRQ44
IRQ43
IRQ42
IRQ41
IRQ40
IRQ39
IRQ38
IRQ37
IRQ36
IRQ35
IRQ34
IRQ33
IRQ32
IRQ31
IRQ30
IRQ29
IRQ28
IRQ27
IRQ26
IRQ25
IRQ24
IRQ23
IRQ22
IRQ21
IRQ20
IRQ19
IRQ18
IRQ17
IRQ16
IRQ15
Table 20 Maskable Interrupts Assignment
MASKABLE INTERRUPT SOURCES
TWM (Timer 0)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
USB Interface
DMA Channel 0
DMA Channel 1
DMA Channel 2
DMA Channel 3
CAN
Advanced Audio Interface (AAI)
UART0 RX
CVSD/PCM Converter
ACCESS.bus
TA (Timer input A)
TB (Timer input B)
VTUA (VTU Interrupt Request 1)
VTUB (VTU Interrupt Request 2)
VTUC (VTU Interrupt Request 3)
VTUD (VTU Interrupt Request 4)
Microwire/SPI RX/TX
UART0 TX
UART0 CTS
Reserved
UART1 RX
UART1 TX
UART2 RX
UART2 TX
UART3 RX
UART3 TX
Description
50
All reserved interrupt vectors should point to default or error
interrupt handlers.
10.5
Nested NMI interrupts are always enabled. Nested
maskable interrupts are disabled by default, however an in-
terrupt handler can allow nested maskable interrupts by set-
ting the I bit in the PSR. The LPR instruction is used to set
the I bit.
Nesting of specific maskable interrupts can be allowed by
disabling interrupts from sources for which nesting is not al-
lowed, before setting the I bit. Individual maskable interrupt
sources can be disabled using the IENAM0 and IENAM1
registers.
Any number of levels of nested interrupts are allowed, limit-
ed only by the available memory for the interrupt stack.
IRQ Number
IRQ14
IRQ13
IRQ12
IRQ11
IRQ10
IRQ9
IRQ8
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
IRQ2
IRQ1
IRQ0
NESTED INTERRUPTS
Reserved
ADC (Done)
MIWU Interrupt 0
MIWU Interrupt 1
MIWU Interrupt 2
MIWU Interrupt 3
MIWU Interrupt 4
MIWU Interrupt 5
MIWU Interrupt 6
MIWU Interrupt 7
Reserved
Random Number Generator (RNG)
Reserved
Flash Program/Data Memory
Reserved
Description

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