st92f120 STMicroelectronics, st92f120 Datasheet - Page 103

• Manufacturer Part Number: st92f120
• Description: 8/16-bit Flash Mcu Family With Ram, Eeprom And J1850 Blpd
• Manufacturer: STMicroelectronics

CLOCK CONTROL REGISTERS (Cont’d)
PLL CONFIGURATION REGISTER (PLLCONF)
R246 - Read/Write
Register Page: 55
Reset Value: xx00x111 (xxh)
Bits 5:4 = MX[1:0]: PLL Multiplication Factor .
Refer to
CAUTION: After these bits are modified, take care
that the PLL lock-in time has elapsed before set-
ting the CSU_CKSEL bit in the CLK_FLAG regis-
ter.
Bits 2:0 = DX[2:0]: PLL output clock divider factor.
Refer to
Figure 48. RCCU General Timing
PLL Multiplier
7
-
CLOCK2
RESET
INTCLK
Internal
Internal
Reset
Reset
Clock
-
Table 21
Table 22
MX1 MX0
for multiplier settings.
for divider settings.
20 s
-
< 4 s
DX2
ST92F120 - RESET AND CLOCK CONTROL UNIT (RCCU)
DX1
Boot ROM execution
Reset phase
User program execution
DX0
0
T
RSPH
Exit from RESET
Table 21. PLL Multiplication Factors
Table 22. PLL Divider Factors
DX2
0
0
0
0
1
1
1
1
MX1
1
0
1
0
DX1
PLL Lock-in Time
0
0
1
1
0
0
1
1
MX0
0
0
1
1
DX0
0
1
0
1
0
1
0
1
PLL switched on by user
PLL selected by user
(PLL OFF, Reset State)
PLL CLOCK/1
PLL CLOCK/2
PLL CLOCK/3
PLL CLOCK/4
PLL CLOCK/5
PLL CLOCK/6
PLL CLOCK/7
CLOCK2 x
CLOCK2
CK
14
10
8
6
VR02113B
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