IDT72V7250L10BB IDT, Integrated Device Technology Inc, IDT72V7250L10BB Datasheet - Page 12

IC FIFO 4096X36 10NS 256BGA

IDT72V7250L10BB

Manufacturer Part Number
IDT72V7250L10BB
Description
IC FIFO 4096X36 10NS 256BGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V7250L10BB

Function
Asynchronous, Synchronous
Memory Size
147K (4K x 36)
Data Rate
100MHz
Access Time
10ns
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Configuration
Dual
Density
144Kb
Access Time (max)
6.5ns
Word Size
72b
Organization
2Kx72
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
BGA
Clock Freq (max)
100MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.15V
Operating Supply Voltage (max)
3.45V
Supply Current
75mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V7250L10BB

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V7250L10BB
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. The programming method can only be selected at Master Reset.
2. Parallel reading of the offset registers is always permitted regardless of which programming method has been selected.
3. The programming sequence applies to both IDT Standard and FWFT modes.
IDT72V7230/7240/7250/7260/7270/7280/7290/72100 3.3V HIGH DENSITY SUPERSYNC II
512 x 72, 1K x 72, 2K x 72, 4K x 72, 8K x 36, 16K x 72, 32K x 72, 64K x 72
LD
0
0
0
X
1
1
1
WEN
1
1
0
X
1
0
1
REN
0
1
1
1
X
0
1
Figure 3. Programmable Flag Offset Programming Sequence
SEN
1
1
0
1
X
X
X
WCLK
X
X
X
X
X
RCLK
12
X
X
X
X
X
SCLK
X
X
X
X
X
X
TM
FIFO
Serial shift into registers:
1 bit for each rising WCLK edge
Parallel read from registers:
Empty Offset
Full Offset
Starting with Empty Offset (LSB)
Ending with Full Offset (MSB)
Parallel write to registers:
Empty Offset
Full Offset
18 bits for the IDT72V7230
20 bits for the IDT72V7240
22 bits for the IDT72V7250
24 bits for the IDT72V7260
26 bits for the IDT72V7270
28 bits for the IDT72V7280
30 bits for the IDT72V7290
32 bits for the IDT72V72100
Read Memory
COMMERCIAL TEMPERATURE RANGE
No Operation
Write Memory
No Operation
IDT72V7230
IDT72V7240
IDT72V7250
IDT72V7260
IDT72V7270
IDT72V7280
IDT72V7290
IDT72V72100
4680 drw06

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