M55800A Atmel Corporation, M55800A Datasheet - Page 229

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

22.2.3
Register Name:
Access Type:
Reset State:
Offset:
• DATA: Data to be Converted (Code Label DAC_DATA_10BITS or DAC_DATA_8BITS depending on RES)
Data that is to be converted by the DAC is stored in this register. Data to be converted must be written in a right-aligned
format.
In 8-bit resolution mode (RES = 1), data written into the Data Holding Register will be shifted to the left by 2 bits and the two
LSBs will be 0.
In both 8-bit and 10-bit modes, data will be read as written after the adjustments are done. All non-significant bits read 0.
1745F–ATARM–06-Sep-07
31
23
15
–
–
–
7
DAC Data Holding Register
DAC_DHR
Read/Write
0
0x08
30
22
14
–
–
–
6
29
21
13
–
–
–
5
28
20
12
–
–
–
4
DATA
27
19
11
–
–
–
3
26
18
10
–
–
–
2
AT91M5880A
25
17
–
–
9
1
DATA
24
16
–
–
8
0
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