CY8C3446LTI-085ES2 Cypress Semiconductor Corp, CY8C3446LTI-085ES2 Datasheet - Page 33

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CY8C3446LTI-085ES2

Manufacturer Part Number
CY8C3446LTI-085ES2
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C3446LTI-085ES2

Lead Free Status / Rohs Status
Supplier Unconfirmed
Document Number: 001-53304 Rev. *L
USBIO features:
Full speed USB 2.0 compliant I/O
Highest drive strength for general purpose use
Input, output, or both for CPU and DMA
Digital Input Path
Digital Output Path
Analog
LCD
PRT[x]DR
Capsense Global Control
PRT[x]CTL
PRT[x]DBL_SYNC_IN
PRT[x]PS
Digital System Input
PICU[x]INTTYPE[y]
PICU[x]INTSTAT
PRT[x]SLW
PRT[x]SYNC_OUT
Digital System Output
PRT[x]BYP
PRT[x]DM2
PRT[x]DM1
PRT[x]DM0
Bidirectional Control
PRT[x]BIE
CAPS[x]CFG1
PRT[x]AG
Analog Global Enable
PRT[x]AMUX
Analog Mux Enable
PRT[x]LCD_COM_SEG
PRT[x]LCD_EN
LCD Bias Bus
Pin Interrupt Signal
PICU[x]INTSTAT
1
Figure 6-8. GPIO Block Diagram
5
0
1
0
1
Interrupt
Logic
0
1
In
OE
Drive
Logic
Display
Data
Logic & MUX
Switches
Input Buffer Disable
Slew
Cntl
Input, output, or both for digital peripherals
Digital output (CMOS) drive mode
Each pin can be an interrupt source configured as rising
edge, falling edge, or both edges
Vddio
Naming Convention
‘x’ = Port Number
‘y’ = Pin Number
Vddio Vddio
PSoC
®
3: CY8C34 Family
PIN
Data Sheet
Page 33 of 127

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