KMPC8548EVTAUJC Freescale Semiconductor, KMPC8548EVTAUJC Datasheet - Page 22

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KMPC8548EVTAUJC

Manufacturer Part Number
KMPC8548EVTAUJC
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KMPC8548EVTAUJC

Lead Free Status / Rohs Status
Supplier Unconfirmed
DDR and DDR2 SDRAM
6.2.2
22
At recommended operating conditions.
MCK[n] cycle time, MCK[n]/MCK[n] crossing
ADDR/CMD output setup with respect to MCK
ADDR/CMD output hold with respect to MCK
MCS[n] output setup with respect to MCK
MCS[n] output hold with respect to MCK
MCK to MDQS Skew
MDQ/MECC/MDM output setup with respect
to MDQS
MDQ/MECC/MDM output hold with respect to
MDQS
MDQS preamble start
DDR SDRAM Output AC Timing Specifications
Parameter
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
Table 19. DDR SDRAM Output AC Timing Specifications
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
Symbol
t
t
t
t
t
t
t
t
t
t
DDKHDS,
DDKHDX,
DDKHMH
DDKHMP
DDKHAS
DDKHAX
DDKHCS
DDKHCX
DDKLDS
DDKLDX
t
MCK
1
–0.5 × t
3.75
1.48
1.95
2.40
1.48
1.95
2.40
1.48
1.95
2.40
1.48
1.95
2.40
–0.6
Min
538
700
900
538
700
900
MCK
– 0.6
–0.5 × t
Max
0.6
MCK
6
+ 0.6
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ps
ps
ns
Notes
2
3
3
3
3
4
5
5
6

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