UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 302

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

300
(b) Transmission
Figure 15-21. Timing of Transmit Completion Interrupt Request in Multi-Processor Transfer Mode
If the multi-processor transfer mode is set by using transfer mode specification register 2 (TRMC2) and bit
7 (POWER2) of asynchronous serial interface mode register 2 (ASIM2) is set to 1, the TxD2 pin outputs a
high level. If bit 6 (TXE2) of ASIM2 is set to 1 next, transmission is enabled. Transmission (ID transmission)
can be started by setting bit 0 (MPS2) of TRMC2 to 1 and writing transmit data to transmit buffer register
2 (TXB2).
Next, confirm that bit 1 (TXBF) of asynchronous serial interface transmit status register 2 (ASIF2) is 0. Then
clear MPS and write transmit data to TXB2 (data transmission). The start bit, multi-processor transfer
appended bit, parity bit, and stop bit are automatically appended to the data.
When transmission is started, the data in TXB2 is transferred to transmit shift register 2 (TXS2) and
sequentially output to the TxD2 pin, starting from the LSB. If the data to be transmitted next has been written
to TXB2 by the time transmission is complete, transmitting the next data is started. If no more data has been
written to TXB2, transmission is stopped until new transmit data is written.
Figure 15-21 shows the timing of a transmit interrupt.
Caution
TxD2 (output)
INTST2
MPS2
TXB2
TXS2
CPU
Before writing transmit data to TXB2, confirm that TXBF = 0 and set or clear the MPS bit.
If the MPS bit is set or cleared with TXBF = 1, the set data of the MPS bit may be appended
to the transmit data currently in TXB2 and transferred.
MPS2
FF
FF
1
CHAPTER 15 SERIAL INTERFACE UART2
data 1 (ID)
TXB2
Start
Data 1 (ID)
Data transfer
User’s Manual U14260EJ4V0UD
D0
MPS2
ID transmit frame
Data 1 (ID data)
…
0
D7
TXB2
MPS2 Stop Start
Data 2 (data)
data 2 (data)
Data transfer
Data transmit frame
D0
…
Data 2 (data)
D7
TXB2
Data 3 (data)
MPS2 Stop
data 3 (data)
Start