UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 112

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

6.2.6 Port 4
port mode register 4 (PM4). An on-chip pull-up resistor can be connected to P40 to P47 in 1-bit units using pull-up
resistor option register 4 (PU4).
110
Port 4 is an 8-bit I/O port with an output latch. Port 4 can be set to the input or output mode in 1-bit units using
The interrupt request flag (KRIF) can be set to 1 by detecting falling edges.
This port can also be used as an address/data bus in external memory expansion mode.
RESET input sets port 4 to input mode.
Figures 6-14 and 6-15 show a block diagram of port 4 and a block diagram of the falling edge detector, respectively.
Cautions 1. An on-chip pull-up resistor is not disconnected even if the external memory expansion mode
PU4:
PM4:
RD:
WR
2. When using the falling edge detection interrupt (INTKR), be sure to set the memory expansion
WR
WR
WR
: Write signal
RD
is set when PU4n = 1 (n = 0 to 7).
mode register (MEM) to 01H.
PORT
Pull-up resistor option register 4
Port mode register 4
Read signal
PM
PU
Memory expansion
PU40 to PU47
PM40 to PM47
(P40 to P47)
mode register
Output latch
Alternate
function
Figure 6-14. Block Diagram of P40 to P47
(MEM)
PU4
PM4
CHAPTER 6 PORT FUNCTIONS
User’s Manual U14260EJ4V0UD
Alternate
Selector
function
Selector
V
DD0
P-ch
P40/AD0
P47/AD7
to