B69000 Asiliant Technologies, B69000 Datasheet - Page 57

• Manufacturer Part Number: B69000
• Manufacturer: Asiliant Technologies

Specifications of B69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

I/O and Memory Address Maps
5-1
Chapter 5
I/O and Memory Address Maps
An extensive set of registers normally controls the graphics system. These registers are a combination of
registers defined by IBM when the Video Graphics Array (VGA) was first introduced, and others that have
been added to support graphics modes that have color depths, resolutions, and hardware acceleration
features that go well beyond the original VGA standard. This chapter provides an overview of the address
locations and sub-addressing mechanisms used to access the various registers and the frame buffer of this
graphics controller.
Some of the registers are directly accessible at various I/O addresses. They may be read-only or write-only,
and some must be read from and written to at different I/O addresses. Most of the other registers are
accessed through a sub-addressing arrangement. The index of the desired register is written to an index
register, and then the desired register may be read from or written to through a data port. Almost all of these
sub-addressed registers are both readable and writable. Still other registers are directly accessible at
various memory addresses and here too, almost all of these registers are both readable and writable.
VGA-Compatible Address Map
Part of the VGA standard requires the VGA graphics system to take the place of either the IBM Monochrome
Display and Printer Adapter (either MDPA or MDA) or the IBM Color Graphics Adapter (CGA). This was
also the case with the IBM Enhanced Graphics Adapter (EGA), VGA’s predecessor. The MDA has registers
at I/O addresses 3B4-3B5 and 3BA, and a character buffer (not a frame buffer -- the MDA is a text-only
device) within the memory address range of B0000-B7FFF. The CGA has registers within I/O addresses
3D4-3D5 and 3DA-3DC, and a frame buffer (for either text or graphics) within the memory address range
of B8000-BFFFF.
The VGA standard introduced numerous modes with features that went beyond those originally provided by
either MDA or CGA. To do this, the VGA standard introduced many additional registers at locations in the
3C0-3CF I/O address range, and an additional frame buffer memory space in the A0000-AFFFF memory
address range through which the frame buffer could be accessed. This additional memory address region
is a 64KB “port-hole” by which the standard 256KB VGA frame buffer is accessed. Either different 64KB
portions of this frame buffer are swapped or “paged” in and out of this port-hole as a way of gaining access
to all of it, or this frame buffer can be reorganized into “planes” that can be made selectively or even
simultaneously accessible though this port-hole as part of a mechanism to enable bit-wise graphics color
manipulation. This was done as part of the VGA standard partly because of the shortage of available
addresses in the first 1MB of memory address space in PC-standard systems.
If a PC with a VGA graphics system does not have either an MDA display system or a CGA graphics system,
the VGA BIOS will initialize the VGA graphics system to take the place of either an MDA if a monochrome
display is attached to the VGA, or of a CGA if a color display is attached. However, if a PC with a VGA
graphics system also has an MDA display system, the VGA is initialized to take the place of a CGA,
regardless of the type of monitor attached to the VGA in order to avoid conflicts with the MDA. Likewise, if
a PC with a VGA graphics system also has a CGA graphics system, the VGA is initialized to take the place
of an MDA, regardless of the type of monitor attached to the VGA. The VGA standard does not allow a
system to have both an MDA display system and a CGA graphics system in the same PC along with a VGA
graphics system.
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69000 Databook
Subject to Change Without Notice
Revision 1.3 8/31/98