B69000 Asiliant Technologies, B69000 Datasheet - Page 153

• Manufacturer Part Number: B69000
• Manufacturer: Asiliant Technologies

Specifications of B69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

11-10
GR07
read/write at I/O address 3CFh with index at address 3CEh set to 07h
7-4
3-0
Note:
GR08
read/write at I/O address 3CFh with index at address 3CEh set to 08h
7-0
Note:
Note:
&+,36
7
7
Reserved
Ignore Color Plane 3 through Ignore Color Plane 0
These bits have effect only when bit 3 of the Graphics Mode Register (GR05) is set to 1 to select
read mode 1.
Bit Mask
This bit mask applies to any writes to the addressed byte of any or all of the 4 memory planes
simultaneously.
This bit mask is applicable to any data written into the frame buffer by the CPU, including data that
is also subject to rotation, logical functions (AND, OR, XOR), and Set/Reset. To perform a proper
read-modify-write cycle into the frame buffer, each byte must first be read from the frame buffer by
the CPU (and this will cause it to be stored in the memory read latches), this Bit Mask Register must
be set and the new data then written into the frame buffer by the CPU.
69000 Databook
Color Don’t Care Register
Bit Mask Register
0: The corresponding bit in the Color Compare Register (GR02) will not be included in color
comparisons.
1: The corresponding bit in the Color Compare Register (GR02) is used in color
comparisons.
0: The corresponding bit in each of the 4 memory planes is written to with the
corresponding bit in the memory read latches.
1: Manipulation of the corresponding bit in each of the 4 memory planes via other
mechanisms is enabled.
6
6
Reserved
5
5
Subject to Change Without Notice
Graphics Controller Registers
4
4
Bit Mask
Ignore Color
Plane 3
3
3
Ignore Color
Plane 2
2
2
Ignore Color
Plane 1
Revision 1.3 8/31/98
1
1
Ignore Color
Plane 0
0
0