MT46V8M16TG-75Z Micron Technology Inc, MT46V8M16TG-75Z Datasheet - Page 20

• Manufacturer Part Number: MT46V8M16TG-75Z
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V8M16TG-75Z

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 750ps
• Maximum Clock Rate: 266MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 140mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Table 18:
PDF: 09005aef816fd013/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 128Mb DDR: Rev. F; Core DDR: Rev. A 4/07 EN
AC Characteristics
Parameter
Access window of DQ from CK/CK#
CK high-level width
Clock cycle time
CK low-level width
DQ and DM input hold time relative to DQS
DQ and DM input pulse width (for each input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS–DQ skew, DQS to last DQ valid, per group, per access
WRITE command to first DQS latching transition
DQ and DM input setup time relative to DQS
DQS falling edge from CK rising – hold time
DQS falling edge to CK rising – setup time
Half-clock period
Data-out High-Z window from CK/CK#
Address and control input hold time (slew rate ≥0.5 V/ns)
Address and control input pulse width (for each input)
Address and control input setup time (slew rate ≥0.5 V/ns)
Data-out Low-Z window from CK/CK#
LOAD MODE REGISTER command cycle time
DQ–DQS hold, DQS to first DQ to go non-valid, per access
Data hold skew factor
ACTIVE-to-READ with auto precharge command
ACTIVE-to-PRECHARGE command
ACTIVE-to-ACTIVE/AUTO REFRESH command period
ACTIVE-to-READ or WRITE delay
REFRESH-to-REFRESH command
interval
AUTO REFRESH command period
Average periodic refresh interval
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
Terminating voltage delay to V
DQS write preamble
Electrical Characteristics & Recommended AC Operating Conditions (-5B)
Notes: 1–6, 15–18, 34 apply to entire table; Notes appear on pages 26–32;
0°C ≤ T
A
≤ +70°C; V
DD
DD
Q = +2.6V ±0.1V, V
CL = 3
CL = 2.5
CL = 2
128Mb
256Mb, 512Mb, 1Gb
128Mb, 256Mb, 512Mb
1Gb
128Mb
256Mb, 512Mb, 1Gb
DD
= +2.6V ±0.1V
20
Symbol
t
t
CK (2.5)
t
t
t
DQSCK
t
t
t
t
t
t
t
t
t
CK (3)
CK (2)
DQSQ
t
DQSH
t
WPRE
DIPW
DQSL
DQSS
t
t
t
t
t
t
t
t
t
t
t
t
MRD
REFC
REFC
RPRE
RPST
t
t
t
QHS
t
t
t
DSH
t
t
RAP
t
RCD
REFI
REFI
RRD
VTD
t
DSS
IPW
t
RAS
RFC
RFC
t
t
QH
AC
CH
DH
IH
DS
HP
HZ
RC
CL
IS
RP
LZ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
F
F
Electrical Specifications – DC and AC
t
128Mb: x4, x8, x16 DDR SDRAM
CH,
–0.70
–0.60
–0.70
t
t
Min
0.45
1.75
0.35
0.40
0.60
0.60
0.25
0.45
0.40
0.35
0.72
QHS
HP -
120
7.5
0.2
0.2
2.2
0.9
0.4
10
15
40
55
15
70
15
10
5
6
0
–
–
–
–
–
–
–
t
CL
-5B
70,000
+0.70
+0.60
+0.70
140.6
Max
0.55
0.55
0.40
1.28
0.50
70.3
15.6
7.5
7.8
1.1
0.6
13
13
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
©2004 Micron Technology, Inc. All rights reserved.
Units
t
t
t
t
t
t
t
t
t
t
ns
CK
ns
ns
ns
CK
ns
ns
ns
CK
CK
ns
CK
ns
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
µs
µs
ns
CK
CK
ns
ns
CK
Notes
46, 52
46, 52
27, 32
26, 27
27, 32
19, 43
19, 43
26, 27
31
52
31
32
35
15
15
36
24
24
50
50
24
24
44
44