MT46V8M16TG-75Z Micron Technology Inc, MT46V8M16TG-75Z Datasheet - Page 18

• Manufacturer Part Number: MT46V8M16TG-75Z
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V8M16TG-75Z

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 750ps
• Maximum Clock Rate: 266MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 140mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Table 13:
Figure 9:
PDF: 09005aef816fd013/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 128Mb DDR: Rev. F; Core DDR: Rev. A 4/07 EN
Parameter/Condition
Clock input mid-point voltage: CK and CK#
Clock input voltage level: CK and CK#
Clock input differential voltage: CK and CK#
Clock input differential voltage: CK and CK#
Clock input crossing point voltage: CK and CK#
–0.30V
2.80V
1.45V
1.25V
1.05V
CK#
CK
Clock Input Operating Conditions
0°C ≤ T
(V
Notes: 1–5, 16, 17, 31 apply to entire table; Notes appear on pages 26–32
SSTL_2 Clock Input
DD
X X
Q = +2.6V ±0.1V, V
Notes:
A
≤ +70°C; V
1.
2.
3. CK and CK# must cross in this region.
4.
5. CK and CK# must have a minimum 700mV peak-to-peak swing.
6. For AC operation, all DC clock requirements must also be satisfied.
7. Numbers in diagram reflect nominal values for all devices other than -5B.
CK or CK# may not be more positive than V
This provides a minimum of 1.15V to a maximum of 1.35V and is always half of V
CK and CK# must meet at least V
DD
Q = +2.5V ±0.2V, V
DD
= +2.6V ±0.1V for -5B)
DD
Symbol
V
V
V
V
V
= +2.5V ±0.2V
MP
IN
ID
ID
IX
(
(
(
(
(
DC
DC
AC
AC
18
DC
X X
)
)
)
)
ID
)
(
DC
)
0.5 × V
MIN when static and is centered around V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Electrical Specifications – DC and AC
DD
Min
1.15
0.36
–0.3
0.7
DD
Q + 0.3V or more negative than V
Q - 0.2
128Mb: x4, x8, x16 DDR SDRAM
0.5 × V
V
V
V
DD
DD
DD
V
Maximum clock level 1
Minimum clock level 1
Max
MP
1.35
Q + 0.3
Q + 0.6
Q + 0.6
DD
(
DC
©2004 Micron Technology, Inc. All rights reserved.
Q + 0.2
)
2 V
IX
(
AC
Units
)
3
SS
V
V
V
V
V
DD
MP
- 0.3V.
V
ID
Q.
(
DC
(
DC
)
Notes
)
.
V
4
7, 10
ID
7, 9
10
7
9
(
AC
) 5