MT48LC16M16A2P-75:DTR Micron Technology Inc, MT48LC16M16A2P-75:DTR Datasheet - Page 83

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MT48LC16M16A2P-75:DTR

Manufacturer Part Number
MT48LC16M16A2P-75:DTR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16A2P-75:DTR

Lead Free Status / Rohs Status
Compliant
Figure 52: Self Refresh Mode
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
BA0, BA1
Address
DQM
CKE
A10
CLK
DQ
High-Z
t CKS
t CMS
Precharge all
active banks
t AS
Single bank
PRECHARGE
All banks
Bank(s)
T0
t CKH
t CMH
t AH
t CK
Note:
1. Each AUTO REFRESH command performs a REFRESH cycle. Back-to-back commands are
t RP
T1
NOP
not required.
t CH
Enter self refresh mode
t CKS
t CL
REFRESH
AUTO
T2
CLK stable prior to exiting
self refresh mode
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
(Restart refresh time base)
Exit self refresh mode
Tn + 1
NOP
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256Mb: x4, x8, x16 SDRAM
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t XSR
SELF REFRESH Operation
To + 1
© 1999 Micron Technology, Inc. All rights reserved.
To + 2
REFRESH
AUTO
Don’t Care

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