N25Q128A13ESF40F NUMONYX, N25Q128A13ESF40F Datasheet - Page 150

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N25Q128A13ESF40F

Manufacturer Part Number
N25Q128A13ESF40F
Description
NUMN25Q128A13ESF40F 128MB SPI FLASH MEMO
Manufacturer
NUMONYX
Datasheet

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9.3.20
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Figure 90. Read NV Configuration Register instruction sequence QIO-SPI
Write NV Configuration Register
The Write Non Volatile Configuration register (WRNVCR) instruction allows new values to
be written to the Non Volatile Configuration register. Before it can be accepted, a write
enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the input data on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Write Non
Volatile Configuration Register (WRNVCR) instruction of the Extended SPI protocol, please
refer to
Section 9.1.29: Write NV Configuration Register
DQ0
DQ1
DQ2
DQ3
S
C
Instruction
0
1
LS Byte MS Byte
Nonvolatile Configuration
2
5
4
6
7
3
1 13 9
0 12 8
2 14 10
3 15 11
Register Out
4
Quad_Read_NVCR
5
for further details.

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