N25Q128A13ESF40F NUMONYX, N25Q128A13ESF40F Datasheet - Page 125

• Manufacturer Part Number: N25Q128A13ESF40F
• Description: NUMN25Q128A13ESF40F 128MB SPI FLASH MEMO
• Manufacturer: NUMONYX

9.2.18
9.2.19
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
Figure 61. Clear Flag Status Register instruction sequence DIO-SPI
Read NV Configuration Register
The Read Non Volatile Configuration Register (RDNVCR) instruction allows the Non Volatile
Configuration Register to be read.
Figure 62. Read NV Configuration Register instruction sequence DIO-SPI
DQ0
DQ1
C
S
DQ0
DQ1
C
S
0
Instruction
1
2
3
0
Instruction
7
6
4
1
LS Byte
5
4
5
Byte
2
Dual_Clear_Flag_SR
3
2
6
3
NVCR Out
1
0
7
15 13 11 9
14 12 10 8
8
MS Byte
9 10 11
Byte
Dual_Read_NVCR
125/180