STA310 STMicroelectronics, STA310 Datasheet - Page 50

IC AUDIO DECODER 6+2CH 80-TQFP

STA310

Manufacturer Part Number
STA310
Description
IC AUDIO DECODER 6+2CH 80-TQFP
Manufacturer
STMicroelectronics
Type
Audio Decoderr
Datasheet

Specifications of STA310

Applications
HDTV, Players, Receivers, Set-Top Boxes
Voltage - Supply, Analog
2.5V
Voltage - Supply, Digital
2.5V
Mounting Type
Surface Mount
Package / Case
80-TQFP, 80-VQFP
Audio Codec Type
MP3 Decoder
No. Of Dacs
3
No. Of Input Channels
2
No. Of Output Channels
6
Adc / Dac Resolution
32bit
Sampling Rate
192kHz
Interface Type
I2C, Serial, Parallel
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8856
STA310

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0
STA310
This register is used to set the value of the status bit in the IEC958 data stream.
SPDIF_REP_TIME
SPDIF repetition time of a pause frame
Address: 0x75
Type: R/W
Software Reset: NC
Hardware: Reset: UND
Description:
In compressed mode, a burst of pause frames is sent when there are no more data to transmit (due to an error
or a gap in the incoming bitstream, for example).
This register sets the size of a pause frame in IEC frames: Dolby Digital =4, MPEG=32 and DTS=3.
SPDIF_LATENCY
Latency value
Address: 0x7E
Type: R/W
Software Reset: NC
Hardware: Reset: UND
Description:
If bit LAT of register SPDIF_CONF is set, a delay can be configured between the output of IEC61937 in com-
pressed mode and the output of the audio decoder. To configure a latency (in unit of seconds) this register has
to be set according the following formula:
Value = L x FS/8 where, L=Latency in s and FS=Sampling frequency in Hz
50/90
COM
COP
PRE
SFR
Bitfield
Compress data bit.
1: compressed mode
0: non compressed mode.
1: copy allowed
0: copy not allowed
1: output has pre-emphasis
0: output does not have pre-emphasis
0000: if sampling frequency = 44.1KHz
0010: if sampling frequency = 48KHz
0011: if sampling frequency = 32KHz
1010: if sampling frequency = 96KHz
7
7
6
6
5
5
4
4
Value
3
3
Description
2
2
1
1
0
0

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