EP2SGX90EF1152C5ES Altera, EP2SGX90EF1152C5ES Datasheet - Page 305
EP2SGX90EF1152C5ES
Manufacturer Part Number
EP2SGX90EF1152C5ES
Description
IC STRATIX II GX 90K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX90EF1152C5ES
Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
558
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1152-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1765
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Figure 4–14. Stratix II GX JTAG Waveforms.
Captured
Driven
Signal
Signal
to be
to be
TMS
TDO
TCK
TDI
t
JCH
Table 4–117
Stratix II GX devices.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
JPZX
JSZX
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 4–117. Stratix II GX JTAG Timing Parameters and Values
Symbol
t
JCP
t
JSSU
t
JCL
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
shows the JTAG timing parameters and values for
t
JSH
t
t
JPCO
JSCO
t
JPSU
Parameter
t
t
JSXZ
JPH
t
JPXZ
Min Max Unit
30
12
12
4
5
4
5
12
12
12
9
9
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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