EP2SGX90EF1152C5ES Altera, EP2SGX90EF1152C5ES Datasheet - Page 272
EP2SGX90EF1152C5ES
Manufacturer Part Number
EP2SGX90EF1152C5ES
Description
IC STRATIX II GX 90K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX90EF1152C5ES
Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
558
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1152-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1765
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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(1)
(2)
Class I
Class II
Class I
Class II
HSTL Class I
HSTL Class II
HSTL Class I
HSTL Class I I
Differential SSTL-18
Differential SSTL-18
1.8-V HSTL CLass I
PCI
PCI-X
Differential SSTL-2
Differential SSTL-2
1.8-V differential
1.8-V differential
1.5-V differential
1.5-V differential
HyperTransport
LVPECL (1),
LVDS
Table 4–90. Stratix II GX Maximum Input Clock Rate for Dedicated Clock Pins (Part 2 of 2)
I/O Standard
LVPECL is only supported on column clock pins.
The first set of numbers refers to the HIO dedicated clock pins. The second set of numbers refers to the VIO
dedicated clock pins.
(1)
(2)
(1)
-3 Speed Grade
500
500
500
500
500
500
500
500
500
500
500
717
450
717
450
717
450
-4 Speed Grade
500
500
500
500
500
500
500
500
500
500
500
717
450
717
450
717
450
-5 Speed Grade
500
400
400
500
500
500
500
500
500
500
500
640
400
640
400
640
400
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
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