MAX191BCWG+ Maxim Integrated Products, MAX191BCWG+ Datasheet - Page 19

• Manufacturer Part Number: MAX191BCWG+
• Description: IC ADC 12BIT 100KSPS W/REF24SOIC
• Manufacturer: Maxim Integrated Products

Specifications of MAX191BCWG+

• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Data Interface: MICROWIRE™, Parallel, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 941mW
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Number Of Adc Inputs: 1
• Architecture: SAR
• Conversion Rate: 100 KSPs
• Resolution: 12 bit
• Input Type: Differential
• Interface Type: 3-Wire (SPI, QSPI, MICROWIRE)
• Supply Voltage (max): 5 V
• Maximum Power Dissipation: 1067 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 18b. Low Average-Power Mode Operation (Internal
Compensation)
which can be achieved using power-down between
conversions.
Figure 19a shows the connection for external compensa-
tion with reference adjustment. In this mode, an external
4.7µF capacitor compensates the reference output
amplifier, allowing for maximum conversion speed and
lowest conversion noise. However, when reactivating the
ADC after power-down, the reference takes typically 2ms
to fully charge the 4.7µF capacitor, so more time is
required before a conversion can start (Figure 19b).
Thus, the average current consumed in power-up/power-
down operations is higher in external compensation
mode than in internal compensation mode.
Figure 20 depicts the nominal, unipolar input/output (I/O)
transfer function, and Figure 22 shows the bipolar I/O
transfer function. Code transitions occur halfway between
successive integer LSB values. Note that 1LSB = 1.00mV
(4.096V/4096) for unipolar operation and 1LSB = 1.00mV
((4.096V/2 - -4.096V/2)/4096) for bipolar operation.
Figures 19a and 21a show how to adjust the ADC gain
in applications that require full-scale range adjustment.
The connection shown in Figure 21a provides ±0.5%
for ±20LSBs of adjustment range and is recommended
for applications that use an external reference. On the
other hand, Figure 19a is recommended for applica-
tions that use the internal reference, because it uses
fewer external components.
If both offset and full scale need adjustment, the circuit
in Figure 21b is recommended. For single-supply
PD
VREF
RD
1
0
15 s
with Internal Reference and Power-Down
______________________________________________________________________________________
Gain and Offset Adjustment
20 s
External Compensation
25 s
Low-Power, 12-Bit Sampling ADC
ADCs, it is virtually impossible to null system negative
offset errors. However, the MAX191 input configuration
is pseudo-differential—only the difference in voltage
between AIN+ and AIN- will be converted into its digital
representation. By applying a small positive voltage to
AIN-, the 0 input voltage at AIN+ can be adjusted to
above or below AIN- voltage, thus nulling positive or
negative system offset errors. R9 and R10 can be
removed for applications that require only positive sys-
tem errors to be nulled. To trim the offset error of the
MAX191, apply 1/2LSB to the analog input and adjust
R6 so the digital output code changes between 000
(hex) and 001 (hex). To adjust full scale, apply FS - 1
1/2LSBs and adjust R2 until the output code changes
Figure 18c. Average Supply Current vs. Conversion Rate,
Powering Down Between Conversions
Figure 19a. External-Compensation Mode with Internal
Reference Adjustment Circuit
0.1 F
10,000
1000
4.7 F
100
10
10
5k
50
CONVERSIONS PER SECOND
11k
15k
200
100k
0.01 F
1k
1
5
6
5k
REFADJ
PD
VREF
20k
MAX191
100k
19